Infinera Corporation

Jiaming Zhang

John William Osenbach

Fred A Kish, Jr

Peter Weindel Evans

Miguel Iglesias Olmedo

Maria Anagnosti

Jie Tang

Joseph Edward Riska

Donald J Pavinski

Radhakrishnan L Nagarajan

James Edward Stewart

David Gerald Coult

Timothy Butrie

Franklin Wall, Jr

John Coronati

Eugene Messenger

Michael Sipics

Renshan Zhang

Consistent with the present disclosure, low pass filters are provided in the electrical paths connecting digital to analog converter (DAC) circuitry to an optical block package (also referred to as a 'gold box'). The low pass filter blocks or substantially attenuates high frequency noise components present in an analog signal output from the DAC, thereby reducing errors that might otherwise be present in the transmitted data.

Low pass filter for TROSA high frequency response suppression

Disclosed herein are multi-layer substrates for integrated circuit packages and methods of making the same. The multi-layer substrate may comprise a plurality of lower layers, at least one core layer, a plurality of upper layers, and a side surface. A first connection and a second connection may extend through or on an uppermost layer of the plurality of upper layers. A trace may be embedded in or on one of the plurality of upper layers, the trace electrically connected to the first connection and the second connection. A first mounting pad and a second mounting pad may be positioned on the side surface and/or the uppermost layer of the plurality of upper layers and a blocking capacitor may be electrically connected to the first mounting pad and the second mounting pad with the second mounting pad electrically connected to the second connection.

Hybrid integrated circuit package

Opto-electronic packages and methods for making opto-electronic packages are disclosed, including a method comprising forming an opto-electronic circuit on a first surface of a substrate of a lower package assembly, the first surface of the substrate having a first bonding pattern configured to provide a hermetic seal, the first bonding pattern extending around the opto-electronic circuit; positioning a bottom of a ring frame onto the first bonding pattern so as to surround the opto-electronic circuit with the ring frame; hermetically sealing a bottom of the ring frame to the first bonding pattern of the first surface of the substrate of the lower package assembly subsequent to the formation of the opto-electronic circuit on the first surface of the substrate; and hermetically sealing a top of the ring frame to form a hermetically sealed opto-electronic package.

Opto-electronic package and a method for making an opto-electronic package

Methods, systems, and apparatus, including a photonic integrated circuit package, including a photonic integrated circuit chip, including an active optical element; an electrode configured to receive an electrical signal; a ground electrode; and a bond contact electrically coupled to the electrode; and an ASIC chip including circuitry configured to provide the electrical signal; and a bond contact that is electrically coupled to the circuitry; an bridge chip bonded to at least a portion of the photonic integrated circuit chip and at least a portion of the ASIC chip.

Photonic integrated circuit package

Methods, systems, and apparatus, including a photonic integrated circuit package, including a photonic integrated circuit chip, including multiple electrodes configured to receive the electrical signal, where at least one characteristics of a segment of the traveling wave active optical element is changed based on the electrical signal received by a corresponding electrode of the multiple electrodes; a ground electrode; and multiple bond contacts; and an interposer bonded to at least a portion of the photonic integrated circuit chip, the interposer including a conductive trace formed on a surface of the interposer, the conductive trace electrically coupled to a source of the electrical signal; a ground trace; and multiple conductive vias electrically coupled to the conductive trace, where each conductive via of the multiple conductive vias is bonded with a respective bond contact of the multiple bond contacts of the photonic integrated circuit chip.

Methods, systems, and apparatus, including a photonic integrated circuit package, including a photonic integrated circuit chip, including a lumped active optical element; an electrode configured to receive an electrical signal, where at least one characteristics of the lumped active optical element is changed based on the electrical signal received by the electrode; a ground electrode; and a bond contact electrically coupled to the electrode; and an interposer bonded to at least a portion of the photonic integrated circuit chip, the interposer including a conductive trace formed on a surface of the interposer, the conductive trace electrically coupled to a source of the electrical signal; a ground trace; and a conductive via bonded with the bond contact of the photonic integrated circuit chip, the conductive via electrically coupled to the conductive trace to provide the electrical signal to the electrode of the photonic integrated circuit chip.

An apparatus including a bridge member and a clamp is disclosed. The bridge member is positioned in a first plane and has a substrate with a first surface and a second surface; and a plurality of distinct conductive pillars formed on the second surface of the substrate. The clamp has a body, a proximal end and a distal end. The body is positioned in a second plane above the first plane with the second plane being within 2 degrees of parallel to the first plane. The proximal end is positioned along the second plane; and the distal end has a plurality of prongs. The distal end is offset from the second plane in a direction toward the bridge member such that each prong contacts the first surface of the substrate.

Clamp interconnect

A photonic transmitter, comprises a modulator driver having a first and second output ports, a photonic integrated transmitter circuit having a modulator having a first and a second input line, and a first input port electrically coupled with the first input line and a second input port electrically coupled with the second input line, and an interconnect bridge assembly, including a first termination resistor, a second termination resistor, and a substrate. An impedance-controlled transmission structure is formed in the substrate, and has: (a) an impedance control section including a first and a second signal lines electrically insulated from one another; and (b) a transmission section including a third and a fourth signal line coupled with termination resistor. The interconnect bridge assembly transmits an impedance controlled differential electrical signal from the modulator driver to the modulator, and transmits the electrical signal from the modulator to the first and second termination resistors.

Interconnect bridge assembly for photonic integrated circuits

Consistent with the present disclosure, a package is provided that includes a housing having a recessed portion to accommodate an integrated circuit or chip. The housing has an inner periphery that defines or delineates the recessed portion. The inner periphery may be stepped and includes first and second surfaces that are spaced vertically from one another and extend in respective parallel planes, for example, to thereby constitute first and second shelves. First bonding pads or contacts ('housing pads') may be provided on the first surface, which may electrically connect or interconnect with first pads on the integrated circuit ('IC pads'), and second housing pads may be provided on the second surface, which can electrically connect or interconnect with second IC pads. Thus, the IC pads connect to corresponding housing pads on the inner periphery of the housing that are above and below one another. Since the housing pads are not provided on the same surface, the number of housing pads on each step or shelf of the periphery can be reduced, and the housing pads can be spaced from one another by a spacing or pitch that is greater than that of the IC pads. Accordingly, the dimensions and spacing of the housing pads may comply with relevant design rules, while providing connection to an increased number of IC pads.

Growing community of inventors

Macungie, PA, United States of America

Jiaming Zhang