Beijing Smartchip Microelectronics Technology Comp

Jiali Hou

Dejian Li

Yi Hu

Xiaoke Tang

Yubo Wang

Jin Yan Shao

Haifeng Zhang

Dongyan Zhao

Xi Feng

Xiaoman Wang

Lixin Yang

Yidong Yuan

Lang Tan

Wennan Feng

Yongwang Ma

An inverse pseudo fully-differential amplifier having a common-mode feedback control circuit and a method for maintaining a stable output common-mode level are provided. The inverse pseudo fully-differential amplifier includes the pseudo fully-differential operation circuit and a common-mode feedback control circuit. The pseudo fully-differential operation circuit includes inverter amplifiers () and (). The inverter amplifiers () and () respectively have a first feedback control terminal and a second feedback control terminal. Input terminals of the common-mode feedback control circuit are respectively connected with output terminals of the inverter amplifier () and (), and are configured to detect common-mode output voltages of the inverter amplifier () and (). An output terminal of the common-mode feedback control circuit is connected with the first feedback control terminal and the second feedback control terminal, and is configured to generate common-mode feedback to the inverter amplifiers () and () to maintain a stable common mode output level.

Inverse pseudo fully-differential amplifier having common-mode feedback control circuit

An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on startup is completed.

Ultra-low power consumption power supply structure

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Beijing, China

Jiali Hou