Gigajot Technology, Inc.

Dartmouth College

Gigajot Technologies, Inc.

Apple Inc.

Id Quantique Sa

Id Quantique

Jiaju Ma

Saleh Masoodian

Eric R Fossum

Michael Guidash

Dexue Zhang

Leo Anzagira

Stanley Chan

Xin Yue

Omar Elgendy

Jifeng Liu

Arnaud Laflaquiere

Xiaoxin Wang

Zhiyuan Wang

Damien Stucki

Donald B Hondongwa

Emna Amri

Donald Hondongwa

Yacine Felk

A pixel of an image sensor may include an anti-blooming (AB) transistor with a gate formed in a shallow trench isolation (STI) of the pixel. The STI is positioned within the horizontal boundaries of the pixel structure. In certain instances, the STI isolates the drain region for a reset transistor of the pixel from a photodiode of the pixel and the AB transistor shares the drain region with the reset transistor. In such instances, the AB transistor may be turned on and provided a higher potential than the photodiode through its gate voltage to drain excess photoelectrons from the photodiode and prevent blooming due to oversaturation of the photodiode. In some instances, the gate of the AB transistor is formed in a separate STI and has its own drain formed next to the gate in the STI with the higher potential being provided through the gate or drain voltage.

Pixel with anti-blooming circuitry formed in shallow trench isolation

First and second modulation gates disposed adjacent a silicon photoconversion structure generate, throughout the exposure interval, alternating first and second electrostatic fields that compel photocharge generated within the silicon photoconversion structure to the first and second storage diodes, respectively. Upon conclusion of the exposure interval, accumulated photocharge within the first and second storage diodes is transferred to first and second floating diffusion nodes, respectively, as part of a correlated-double-sampling readout with respect to each of the floating diffusion nodes.

Time-of-flight pixel sensor with high modulation contrast

An image sensor includes an array of CMOS pixels and a plurality of micro-lens arrays. Each micro-lens array of the plurality of micro-lens arrays includes a plurality of horizontally adjacent micro-lenses. Each micro-lens array of the plurality of micro-lens arrays is situated above a respective CMOS pixel in the array of CMOS pixels.

CMOS image sensors with per-pixel micro-lens arrays

An image sensor may include a plurality of pixels, each of which may include a photodiode having a charge accumulation region ('PD'), a floating diffusion region (“FD”), and a charge transfer region vertically between the PD and FD. The vertical charge transfer region may include a first charge modulation region (“P1”), a second charge modulation region (“P2”), and a third charge modulation region (“P3”). The image sensor may operate in a global shutter mode, in which the P2 may be used as an in-pixel charge memory region to temporarily store charge during transfer of the charge from PD to FD via P1, P2, and P3.

Global shutter pixel with vertically integrated multi-phase charge transfer

An image sensor may include a plurality of light-gathering pixels and a plurality of substrates. The pixels may each comprise at least one photodiode, a floating diffusion node, and a pixel readout circuit. The pixel readout circuit may include a plurality of transistors, which may be controlled to transfer electrical charge out of the photodiode through the floating diffusion node to generate an analog signal at an output. The pixels may be formed or fabricated on or within the substrates such that for each pixel, a first substrate may include the photodiode, floating diffusion node, and a first subset of the transistors of the pixel readout circuit that is electrically connected with the floating diffusion node directly, and one or more other substrates may include at a second subset of the transistors that is electrically connected with the floating diffusion node indirectly.

Multiple-substrate high conversion gain pixels

First and second readout circuits, each having a respective floating diffusion node, are coupled to a photodetection element within a pixel of an integrated-circuit image sensor. Following an exposure interval in which photocharge is accumulated within the photodetection element, a first portion of the accumulated photocharge is transferred from the photodetection element to the first floating diffusion node to enable generation of a first output signal within the first readout circuit, and a second portion of the accumulated photocharge is transferred from the photodetection element to the second floating diffusion node to enable generation of a second output signal within the second readout circuit. A digital pixel value is generated based on the first and second output signals.

Image sensor with switchable in-pixel binning during readout

A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.

Sub-ranging programmable gain amplifier

Systems and methods are disclosed to enable fast readout from an image sensor to support pixel-wise conversion gain selection for high dynamic range imaging. In embodiments, an image sensor integrated circuit performs the pixel-wise gain selection with its readout circuitry, so that the image sensor outputs pixels with only the selected gain option. In this manner, the image sensor is able to achieve faster frame rates and lower power consumption. Depending on the embodiment, the conversion gain may be selected by the readout logic, an image signal processor, or an auto-exposure engine. The gain selection may be made based on a previous image captured by the camera or other pixels in the same image. The image signal processor may interpolate a high-gain and a low-gain portion of the image to obtain full resolution images in the two gain options, and merge the two to obtain the final image.

Dynamic pixel-wise multi-gain readout for high dynamic range imaging

An image sensor may a plurality of pixels, one or more analog-to-digital conversion (ADC) circuits, and at least one quantization circuit. The pixels may generate analog signals based on photoelectrons accumulated by the pixels when exposed to light. The ADC circuits may convert the analog signals to digital signals, wherein the digital signals may include (a) a first set of digital signals individually having a value corresponding to an integer number of discrete photoelectrons and (b) a second set of digital signals individually having a value between values of the first set of digital signals so as to correspond to a non-integer number of discrete photoelectron. The quantization circuit may convert the second set of digital signals to a third set of digital signals, wherein the third set of digital signals individually has a value corresponding to an integer number of discrete photoelectrons.

Image sensors with on-chip ADC data compression for multi-bit electron-number outputs

A sensing device includes a light source to emit light, a light sensor to detect reflection of the emitted light and distance determination circuitry responsive to reflected-light detection within the light sensor. The light sensor includes a photodetector having a photocharge storage capacity in excess of one electron and an output circuit that generates an output signal responsive to light detection within the photodetector with sub-hundred nanosecond latency. The distance determination circuitry measures an elapsed time based on transition of the output signal in response to photonic detection within the photodetector and determines, based on the elapsed time, a distance between the sensing device and a surface that yielded the reflection of the emitted light.

High-sensitivity depth sensor with non-avalanche photodetector

Correlated double sampling column-level readout of an image sensor pixel (e.g., a CMOS image sensor) may be provided by a charge transfer amplifier that is configured and operated to itself provide for both correlated-double-sampling and amplification of floating diffusion potentials read out from the pixel onto a column bus after reset of the floating diffusion (i) but before transferring photocharge to the floating diffusion (the reset potential) and (ii) after transferring photocharge to the floating diffusion (the transfer potential). A common capacitor of the charge transfer amplifier may sample both the reset potential and the transfer potential such that a change in potential (and corresponding charge change) on the capacitor represents the difference between the transfer potential and reset potential, and the magnitude of this change is amplified by the charge change being transferred between the common capacitor and a second capacitor selectively coupled to the common capacitor.

Image sensor having column-level correlated-double-sampling charge transfer amplifier

Integrated-circuit imagers selectively multi-sample pixel array outputs according to luminance level indicated by an initial sample, avoiding the additional power/time required for multi-sampling in high-luminance, shot-noise-dominated conditions and, conversely, multi-sampling in readout-noise-dominated low-luminance conditions.

Selectively multi-sampled pixel array

An amplifier transistor within an image-sensor pixel is implemented upside down relative to conventional orientation such that a substrate-resident floating diffusion node of the pixel forms the gate of the amplifier transistor—achieving increased pixel conversion gain by eliminating the conventional metal-layer interconnection between the floating diffusion node and amplifier-transistor gate and concomitant parasitic capacitance.

Enhanced conversion-gain image sensor

According to some embodiments, an image sensor pixel includes a floating diffusion, a transistor gate configured to transfer charge with respect to the floating diffusion, and a doped pinning region disposed between the floating diffusion and the transistor gate, to reduce or eliminate the effective capacitive coupling between the floating diffusion and the transistor gate. The transistor gate may be an in-pixel transfer gate configured to selectively transfer photocharge from an in-pixel charge accumulation region to the floating diffusion. Alternatively, or additionally, the transistor gate may be an in-pixel reset gate configured to selectively reset the electrostatic potential of the floating diffusion.

Growing community of inventors

Monrovia, CA, United States of America

Jiaju Ma