Yangtze Memory Technologies Co., Ltd.

Jiaguo Li

Feifei Zhu

Na Cao

Implementations of the present disclosure disclose a memory controller and a control method thereof, a memory apparatus and a control method thereof, and a memory system and a control method thereof. The memory controller is coupled with at least one memory apparatus, and the memory apparatus includes a plurality of pages; the memory controller is configured to: receive a first command set, wherein the first command set includes at least one read command; when the first command set meets a first preset condition, enable a first read mode, wherein the first preset condition includes that the queue depth of the first command set is 1 or the total length of logical addresses in the first command set is less than or equal to a first threshold value; send demands corresponding to the first command set to the memory apparatus; and output data corresponding to the logical addresses in the first command set among all data of a first page sent by the memory apparatus, wherein the first page is a page, which corresponds to the logical addresses in the first command set, in the memory apparatus.

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Wuhan, China

Jiaguo Li