Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies Ecbu IP (singapore) Pte. Ltd.

Jia Peng

Kwee Chong Chang

Gek Yong Ng

Shan Jiang

Fun Kok Chow

Chee Heng Wong

Kok Keong Richard Lum

An isolation device having first and second semiconductor is disclosed. The first semiconductor die may be adapted to transmit a first signal to the second semiconductor die that is electrically isolated. The first semiconductor die may have a transmitter coupled to a modulator that modulates the first signal. The second semiconductor die may have a receiver having a counter and a control circuit. The control circuit may be adapted to determine an indication of the first signal by using the counter. In addition, an isolation system and a DC-DC feedback regulation control system having such control circuit are disclosed. Likewise, a method for conveying a first signal across an isolation barrier is disclosed. The method may comprise counting a received signal based on internal clock and determining an indication of the first signal from the counter's count value.

Isolation device and system

Various embodiments of systems for transmitting and receiving digital and/or analog signals across a single isolator, solid state lighting systems, or DC/DC converter feedback regulation control systems are disclosed. In one embodiment, a first signal may be modulated into a first modulated signal. The first modulated signal is then modulated into a second modulated signal in accordance to a second signal. The second modulated signal is in turn, modulated into a third modulated signal in accordance to a third signal. At least some of the apparatuses, circuits, systems and methods disclosed herein may be implemented using conventional CMOS design and manufacturing techniques and processes to provide, for example, at least one or more integrated circuits.

Transmitting and receiving digital and analog signals across an isolator

Digital trimming logic is included in a microelectronic device of a type that produces an output signal in response to an input signal and a threshold signal. Trimming logic values are produced in response to a clock signal that is applied to the device in a trimming mode. The clock signal can be applied to a device pin that is used in normal operation to provide an output signal, thus allowing the pin to serve a dual function. The trimming logic changes the trimming logic value in response to the clock signal until the trimming logic value reaches a trim value at which the threshold signal is substantially equal to the input signal. The trimming logic then stores the trim value in a non-volatile memory and enters a locked mode in which further trimming is prevented and the device is ready for normal operation.

Digital trimming in a microelectronic device

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Singapore, Singapore

Jia Peng