Taiwan Semiconductor Manufacturing Comp. Ltd.

Jia-Ming Yang

Chuan-Yu Wu

Chris Huang

In a memory device with a bank of N memory blocks, an address is generated for a first and a second one of the blocks. The first and second addresses include addresses for current first and second possible 'refresh blocks'. If its memory block does not contend with the current first possible refresh block, an externally generated access to one of the N memory blocks is permitted and at least a portion of the refresh block is refreshed during a certain interval. In another aspect, the externally generated access is permitted and at least a portion of the current second possible refresh block is refreshed during the same certain interval if: i) the memory block of the externally generated access contends with the current first possible refresh block and ii) the current first and second possible refresh blocks are different ones of the N memory blocks.

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Hsin-Chu, Taiwan

Jia-Ming Yang