Ningbo Advanced Memory Technology Corporation

Being Advanced Memory Taiwan Limited

Jiangsu Advanced Memory Technology Co., Ltd.

Alto Memory Technology Corporation

Jia-Hwang Chang

Jui-Jen Wu

Sheng-Tsai Huang

Fan-Yi Jien

A memory driving circuit is disclosed herein. The memory driving circuit includes a programmable current source, a reference voltage generation unit and a voltage comparator unit, The programmable current source generates a second current according to a first current. The second current flows into a memory cell, and produces a device voltage at the input of the memory cell. The reference voltage generation unit generates a crystal voltage. The voltage comparator unit compares the device voltage with the crystal voltage and sends out a control signal to control the programmable current source. The first current and the second current are adjusted by the control signal so that the shape of the current pulse of SET operation to the memory cell is well controlled.

Memory driving circuit

A non-volatile memory cell and a non-volatile memory device are provided. The non-volatile memory cell includes a latch structure, a first read/write circuit, a first memristor, a second read/write circuit and a second memristor. The first read/write circuit controls a writing operation of the first memristor. The second read/write circuit controls a writing operation of the second memristor. When a restore operation is performed, the data in the latch structure is restored by using the resistance difference between the first memristor and the second memristor. The non-volatile device of the invention combines the advantages of fast memory unit and non-volatile memory, and it may work at a high speed and retain data when powered off.

Non-volatile memory cell and non-volatile memory device

A non-volatile memory device includes plural non-memory cells. Each non-volatile memory cell includes a first switch, a first memristor, a second switch, a second memristor and a third switch. The control terminal of the first switch is coupled to a word line. The first memristor is provided with a first impedance. The control terminal of the second switch is coupled to the word line. The second memristor is provided with a second impedance. The first switch, the first memristor, the second switch and the second memristor are serially connected between a bit line and an inverted bit line in an alternate manner. The third switch is used for configuring the first impedance and the second impedance. The non-volatile memory device provided by the disclosure has a characteristic of quick access and the data stored therein does not require a dynamic update.

Non-volatile memory device with memristor

A memory driving circuit includes a current source configured to output a second current, a first switching unit configured to undergo switching to connect to the current source selectively to output the second current, a voltage generating unit configured to provide a reference voltage, a capacitive energy storage unit configured to store energy according to the reference voltage, a third switching unit configured to undergo switching to connect the voltage generating unit and the capacitive energy storage unit selectively, a second switching unit configured to undergo switching to connect the capacitive energy storage unit selectively to output a third current, and a current output terminal configured to output the second current, the third current, or the sum of the second current and the third current.

A memory device includes a memory array, a word line driver, and source drivers. The memory array includes memory units. The memory units arranged in the same column are coupled to corresponding bit line. The memory units arranged in the same row are coupled to corresponding word line. The memory units arranged in the rows are divided into N groups, in which N is an integer greater than or equal to 2. The word line driver is configured to selectively enable the word lines. Source drivers are coupled to the memory units in the groups respectively and configured to output N source control signals. When any word line in a first group is enabled, the source control signals corresponding to the first group and a second group of which the sequence for read-write operation is next to the first group are controlled at a select level by corresponding source drivers.

Growing community of inventors

Hsinchu County, Taiwan

Jia-Hwang Chang