National Cheng-Kung University

Jia-Ching Wang

Jhing-Fa Wang

Tai-Haur Kuo

Han-Chiang Chen

Tai-Lung Chen

Ming-Chi Shih

Bo-Wei Chen

Chia-Hung Chang

Chin-Chan Chang

Chen-Yu Chen

Yun-Fei Chao

A multiple-reference-embedded comparator (MREC) circuit includes a tail current source circuit; an input transistor pair, coupled to the tail current source circuit, configured to receive differential input voltages and perform a first pre-amplification to generate first differential amplified voltages according to the differential input voltages; and a plurality of embedded reference (ER) branches, each coupled to the input transistor pair, each configured to perform a second pre-amplification to generate second differential amplified voltages according to the first differential amplified voltages, and to perform a discrete-time comparison to generate differential output voltages according to the second differential amplified voltages.

Multiple-reference-embedded comparator and comparison method thereof

A video summarized method based on mining the story structure and semantic relations among concept entities has steps of processing a video to generate multiple important shots that are annotated with respective keywords: Performing a concept expansion process by using the keywords to create expansion trees for the annotated shots; rearranging the keywords of the expansion trees and classifying to calculate relations thereof; applying a graph entropy algorithm to determine significant shots and edges interconnected with the shots. Based on the determined result of the graph entropy algorithm, a structured relational graph is built to display the significant shots and edges thereof. Consequently, users can more rapidly browse the content of a video and comprehend if different shots are related.

Video summarization method based on mining story structure and semantic relations among concept entities thereof

The present invention discloses a video summarization system and the method thereof. A similarity computing apparatus computes the similarity between each frame to obtain multiple similarity values. A key frame extracting apparatus chooses the key frames from the frames wherein the sum of the similarity values between the key frames is a minimum. A feature space mapping apparatus converts the sentences into multiple corresponding sentence vectors and computes the distance between each sentence vector to obtain multiple distance values. A clustering apparatus divides the sentences into multiple clusters according to the distance values and the importance of the sentences, and also applies a splitting step to split the cluster with the highest importance into multiple new clusters. A key sentence extracting apparatus chooses multiple key sentence from the clusters, wherein the sum of the importance of the key sentences is the maximum.

Video summarization system and the method thereof

The present invention includes a method for speech encoding and decoding and a design of speech coder and decoder. The characteristic of speech encoding method relies on the type of data with high compression rate after the whole speech data is compressed. The present invention is able to lower the bit rate of the original speech from 64 Kbps to 1.6 Kbps and provide a bit rate lower than the traditional compression method. It can provide good speech quality, and attain the function of storing the maximum speech data with minimum memory. As to the speech decoding method, some random noises are appropriated added into the exciting source, so that more speech characteristics can be simulated to produce various speech sounds. In addition, the present invention also discloses a coder and a decoder designed by application specific integrated circuit, and the structural design is optimized according to the software. Its operating speed is much faster than the digital signal processor, and suits the system requiring fast computation speed such as multiple line encoding; its cost is also lower than the digital signal processor.

Method and apparatus for speech coding and decoding

The present invention discloses a complete speech recognition system having a training button and a recognition button, and the whole system uses the application specific integrated circuit (ASIC) architecture for the design, and also uses the modular design to divide the speech processing into 4 modules: system control module, autocorrelation and linear predictive coefficient module, cepstrum module, and DTW recognition module. Each module forms an intellectual product (IP) component by itself. Each IP component can work with various products and application requirements for the design reuse to greatly shorten the time to market.

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Tainan, Taiwan

Jia-Ching Wang