Samsung Electronics Co., Ltd.

Ji-young Lee

Sang-Gyun Woo

Gi-Sung Yeo

Joon-Soo Park

Han-Ku Cho

Cha-Won Koh

Jeong Su Han

Hyun-Jae Kang

Jeong-lim Nam

Joo-Young Ha

Myeong-Cheol Kim

Sung-Gon Jung

Kyung-Yub Jeon

Hak-Sun Lee

Cha-won Koh

Yong Jong Park

Joo-Hyun Lee

Jun Hyuk Seo

Dong-Seok Lee

Kook Jeong Seo

Seung-Pil Chung

Yool Kang

Jong Sung Park

Jae-Seung Hwang

Jung-hyeon Lee

Doo-youl Lee

Suk-Joo Lee

Boo Keun Yoon

Pan-suk Kwak

Myoung Keun Kwon

Jun Hoe Choi

Yong-Hyun Kwon

Seok-hwan Oh

Dae-Hyun Jang

Jeong-su Han

Sang Tak Lee

Byung Ik Choi

Hyung Min Son

Jun-hoe Choi

Tae-gyoon Noh

Seo-ho Lee

Myoung-mee Kim

Ji Yun Yeo

Disclosed are an electronic device for food management and a control method thereof. A control method of an electronic device for food management includes measuring intensity of light, which is irradiated with food and reflected, by wavelengths using an infrared sensor; obtaining state information of the food based on the measured light intensity information; and adjusting at least one of temperature and humidity of an area where the food is disposed in the electronic device based on at least one of the obtained state information and preset usage plan information of the food. Accordingly, food which is managed in an optimal state in consideration of a state of a food stored in an electronic device and a using method (consumption period and consumption method) of the food can be provided to a user.

Electronic device for food management and control method thereof

Disclosed herein is a refrigerator including a vacuum packing device. The refrigerator includes a body and a vacuum packing device provided in the body and configured to suction air in a vinyl pack having a check valve, wherein the vacuum packing device includes a vacuum pump provided to suction the air, a switch module provided to control an operation of the vacuum pump, a suction head including a first path directly connected to the check valve and configured to suction the air, and a chamber including a first opening connected to the first path and provided to collect a foreign substance suctioned through the suction head.

Refrigerator

Disclosed herein is a cooking apparatus capable of cooking a plurality of cooking materials using a heat transfer regulator having a plurality of regions in which a reflectance against heat generated by a heater is variable, and a controlling method thereof. In accordance with one aspect of the present disclosure, a cooking apparatus includes at least one heater and a heat transfer regulator provided to face the at least one heater and provided with a plurality of regions each having a different reflectance against heat generated by the at least one heater.

Cooking apparatus and controlling method thereof

A cooking appliance includes a cooking chamber in which food is accommodated, a machine room separated from the cooking chamber, an exhaust assembly configured to discharge fluids inside the machine room to the outside, and a sensor assembly provided in the machine room and configured to measure the amount of steam of fluids which flow from the cooking chamber to the machine room by driving of the exhaust assembly.

Cooking appliance and method of controlling the same

A semiconductor device and method are disclosed in which an interlayer insulating layer is patterned using multiple overlaying masks to define the geometry of contact plugs and corresponding wiring layers separated by fine pitches.

Semiconductor device having fine pattern wiring lines integrally formed with contact plug and method of manufacturing same

A method of forming hard mask employs a double patterning technique. A first hard mask layer is formed on a substrate, and a first sacrificial pattern is formed on the first hard mask layer by photolithography. Features of the first sacrificial pattern are spaced from one another by a first pitch. A second hard mask layer is then formed conformally on the first sacrificial pattern and the first hard mask layer so as to delimit recesses between adjacent features of the first sacrificial pattern. Upper portions of the second hard mask layer are removed to expose the first sacrificial pattern, and the exposed first sacrificial pattern and the second sacrificial pattern are removed. The second hard mask layer and the first hard mask layer are then etched to form a hard mask composed of residual portions of the first hard mask layer and the second hard mask layer. A fine pattern of a semiconductor device, such as a trench isolation region or a pattern of contact holes, can be formed using the hard mask as an etch mask.

Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same

A semiconductor device has a structure of contacts whose size and pitch are finer that those that can be produced under the resolution provided by conventional photolithography. The contact structure includes a semiconductor substrate, an interlayer insulating layer disposed on the substrate, annular spacers situated in the interlayer insulating layer, first contacts surrounded by the spacers, and a second contact buried in the interlayer insulating layer between each adjacent pair of the first spacers. The contact structure is formed by forming first contact holes in the interlayer insulating layer, forming the spacers over the sides of the first contact holes to leave second contact holes within the first contact holes, etching the interlayer insulating layer from between the spacers using the first spacers as an etch mask to form third contact holes, and filling the first and second contact holes with conductive material. In this way, the pitch of the contacts can be half that of the first contact holes.

Semiconductor device having fine contacts and method of fabricating the same

Methods of forming patterns in semiconductor devices are provided including forming first patterns spaced apart from one another on an object structure. A first sacrificial layer is formed conformally on the first patterns and the object structure. A second pattern is formed on a sidewall of the first sacrificial layer, the second pattern having a height smaller than that of the first pattern from an upper surface of the object structure. The first patterns are selectively removed to form an opening that exposes the object structure. A third pattern is formed on a sidewall of the opening.

Methods of forming patterns in semiconductor devices

A method of forming a fine pattern of a semiconductor device using a fine pitch hard mask is provided. A first hard mask pattern including first line patterns formed on an etch target layer of a substrate with a first pitch is formed. A first layer including a top surface where a recess is formed between adjacent first line patterns is formed. A second hard mask pattern including second line patterns within the recess is formed. An anisotropic etching process is performed on the first layer using the first and the second line patterns as an etch mask. Another anisotropic etching process is performed on the etch target layer using the first and the second hard mask patterns as an etch mask.

Method of forming pattern using fine pitch hard mask

A method for forming hard mask patterns includes, sequentially forming first, second, and third hard mask layers formed of materials having different etching selectivities on a substrate, forming first sacrificial patterns having a first pitch therebetween on the third hard mask layer, forming fourth hard mask patterns with a second pitch between the first sacrificial patterns, the second pitch being substantially equal to about &#xbd; of the first pitch, patterning the third hard mask layer to form third hard mask patterns using the fourth hard mask patterns as an etch mask, patterning the second hard mask layer to form second hard mask patterns using the third and fourth hard mask patterns as an etch mask, and patterning the first hard mask layer to form first hard mask patterns with the second pitch therebetween using the second and third hard mask patterns as an etch mask.

Method for forming hard mask patterns having a fine pitch and method for forming a semiconductor device using the same

A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

Method for forming fine patterns of a semiconductor device using a double patterning process

A method of manufacturing a mask includes designing a first mask data pattern, designing a second mask data pattern for forming the first mask data pattern, acquiring a first emulation pattern, which is predicted from the second mask data pattern, using layout-based Self-Aligning Double Patterning (SADP) emulation, comparing the first emulation pattern with the first mask data pattern, and modifying the second mask data pattern according to results of the comparison. The method further includes performing Optical Proximity Correction (OPC) on the modified second mask data pattern, acquiring second emulation patterns, which are predicted from the second mask data pattern on which the OPC has been performed, using image-based SADP emulation, and comparing the second emulation patterns and the first mask data pattern and manufacturing a first mask layer, which corresponds to the second mask data pattern on which the OPC has been performed, according to the results of the comparison.

Method of manufacturing a mask

Provided is a method for forming patterns of a semiconductor device. According to the method, first mask patterns may be formed on a substrate, and second mask patterns may be formed on sidewalls of each first mask pattern. Third mask patterns may fill spaces formed between adjacent second mask patterns, and the second mask patterns may be removed. A portion of the substrate may then be removed using the first and third mask patterns as etch masks.

Method for forming patterns of semiconductor device

Semiconductor device having fine contacts

Growing community of inventors

Yongin-si, South Korea

Ji-young Lee