Electronics and Telecommunications Research Institute

Ji-Won Jung

Nae-Soo Kim

Eun-A Choi

Deock-Gil Oh

In-Ki Lee

Sung-Jun Cho

Tae-Gil Lee

Sang-Jin Park

An apparatus and method for producing error correction code and error correction decoding are provided. The method for producing error correction code includes generating an asymmetric matrix by arranging input data bits in a matrix of a predefined size and adding a zero bit column and/or a zero bit row, each of the column and the row consisting of zero bits, to the matrix; primarily encoding the asymmetric matrix by adding one or more parity bits to each row; and secondarily encoding the primarily encoded matrix by adding one or more parity bits to each column of the encoded matrix.

Method of producing and decoding error correction code and apparatus therefor

A turbo TCM decoder for performing a soft decision without performing a sector phase quantization is disclosed. The turbo TCM decoder includes: a symbol transformer for converting a received signal to signal bits of QPSK mode by using an I-axis coordinate and a Q-axis coordinate on a constellation of the received signal; a phase sector quantizer for performing a phase sector quantization or the received signal by using the I-axis coordinate and the Q-axis coordinate; a first decoder for determining coded data by decoding the converted signal bits; a delay for delaying the quantized signal; and a second decoder for determining un-coded data by using the delayed quantized signal and the determined coded data.

Apparatus and method for decoding turbo TCM using coset mapping

Provided are an LDPC decoding apparatus and method using a sequential decoding algorithm having a partial group, capable of reducing the number of an iterative decoding by more than half without degrading the performance and increasing an amount of computation. The LDPC decoding method includes the steps of: receiving a prior probability information (channel values) based on information on channel values associated with distance between symbol signals in constellation related to the received noise and LDPC encoded data, and initializing bit nodes; dividing check nodes into partial groups before updating check node information based on the prior probability information, and performing a decoding by applying a sequential decoding algorithm; determining whether a parity check equations are satisfied; and outputting decoded messages obtained when satisfying the parity check equation or after terminating an iterative processor by a termination algorithm.

LDPC decoding apparatus and method with low computational complexity algorithm

The present invention relates to a pre-processing apparatus using nonuniform quantization of a channel reliability value and a low density parity check (LDPC) decoding system. The pre-processing apparatus can present degradation in performance and be embodied simply by performing decoding pre-process by estimating a discrete channel reliability value (L*) through nonuniform quantization of a channel reliability value based on a relations between a bit error rate (BER) estimated through a simulation performed in advance and a standard deviation (&#x3c3;) of channel noise within a predetermined range of noise estimation error and p, and bit-shifting a receiving signal as much as a discrete channel reliability value. The pre-processing apparatus includes: a channel reliability measuring unit, a nonuniform quantizing unit, a sign bit adding unit, a bit shifting unit.

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Busan, South Korea

Ji-Won Jung