Samsung Electronics Co., Ltd.

Ji-Hun Shin

Won-Ho Choi

Young-Kyun Jeong

Chang-Eun Kang

Dong-Hun Lee

Seog-Heon Ham

Jin-Ho Seo

Min-Sun Keel

Eun-young Jin

Kyo-Jin Choo

Yu-Jin Park

Young-Tae Jang

Hyuk-Bin Kwon

Dae-Hwa Paik

Ji-Min Cheon

A data transmission circuit includes a data output unit (DOU) connected to a positive data transmission line and a negative data transmission line. The DOU generates a recovered data signal based on data signals communicated via the positive and negative data transmission lines. Data signal driving units are respectively connected at different points along the positive and negative data transmission lines, where each data signal driving unit generates and provides a positive data signal and a negative data signal based on a data input signal and a data transmission distance between the data signal driving unit and the data output unit.

Data transmission circuit, image sensor including the same

A counter circuit includes a first counter and a second counter. The first counter is configured to count a first counter clock signal which toggles with a first frequency to generate upper (N&#x2212;M)-bit signals of N-bit counter output signals, in response to a first counting enable signal based on a first comparison signal during a coarse counting interval. N and M are natural numbers, N is greater than M, and M is greater than or equal to 3. The second counter is configured to count a second counter clock signal which toggles with a second frequency which is higher than the first frequency to generate lower M-bit signals of the N-bit counter output signals, in response to a second counting enable signal based on the first comparison signal and a second comparison signal during a fine counting interval which follows the coarse counting interval.

Counter circuit, analog-to-digital converter, and image sensor including the same and method of correlated double sampling

A correlated double sampling (CDS) circuit included in an image sensor includes a sampling unit and a timing controlled band-limitation (TCBL) unit. The sampling unit is configured to generate an output signal by performing a CDS operation with respect to a reset component of an input signal and an image component of the input signal based on a ramp signal, the input signal being provided from a pixel array included in the image sensor. The TCBL unit is connected to the sampling unit, and is configured to remove noise from the output signal based on a timing control signal. The timing control signal is activated during a first comparison duration, in which a first comparison operation is performed with respect to the ramp signal and the reset component of the input signal, and during a second comparison duration, in which a second comparison operation is performed with respect to the ramp signal and the image component of the input signal.

Correlated double sampling circuit and image sensor including the same

A sampling circuit samples an input signal by using at least one switch, at least one capacitor, an amplifier, and a clamp block connected between an output terminal and a negative input terminal of the amplifier. The clamp block prevents a difference between a voltage level of the output terminal of the amplifier and a voltage level of the negative input terminal of the amplifier during sampling from exceeding a maximum voltage difference.

Sampling circuit and image signal amplifying circuit each including feedback clamp block and image sensor including the image signal amplifying circuit

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Seongnam-si, South Korea

Ji-Hun Shin