Lg Display Co., Ltd.

Ji-Eun Chae

Su-Hwan Moon

Tae-Keun Lee

Bo-Young Jung

Jung-Eun Ahn

Do-Heon Kim

Soo-Hwan Moon

Cheon-Kee Shin

Hye-Rim Seo

The present invention relates to a shift register in which a structure of a switching device of an output buffer unit is changed for reducing power consumption. The shift register includes a plurality of stages each having a plurality of switching devices, for forwarding a scan pulse in succession, wherein the at least one of the plurality of switching device has a first area at which a gate electrode thereof overlaps with a first electrode thereof with a size different from a second area at which the gate electrode overlaps with a second electrode thereof.

Shift register

An in-cell touch type liquid crystal display device includes a touch line and a dummy touch line along a direction between neighboring pixel electrodes on a first passivation layer; a second passivation layer on the touch line and the dummy touch line; and common electrodes separated from one another in respective touch blocks, and each including first openings corresponding to each pixel region and a second opening corresponding to the touch line, wherein a connection pattern extending over a gate line from a side of the touch line at an inner region of the touch block is connected to a common electrode through a touch contact hole, and wherein an open portion is between the touch line and the dummy touch line.

In-cell touch type liquid crystal display device

Disclosed herein are an apparatus and method for driving a liquid crystal display device. The apparatus includes a liquid crystal panel in which the same colors of three-color sub-pixels are arranged in the directions of a plurality of gate lines, a data driver for driving a plurality of data lines, a first gate driver for sequentially driving (n&#x2212;3)th and (n)th gate lines among the gate lines during odd frame periods, a second gate driver for sequentially driving (n&#x2212;2)th and (n&#x2212;1)th gate lines among the gate lines during even frame periods, and a timing controller for generating different first and second gate control signals and a data control signal according to odd and even frame periods to supply the first and second gate control signals and the data control signal to the first and second gate drivers and the data driver, respectively.

Apparatus and method for driving liquid crystal display

A shift register is discussed in which a pull-up switching device is turned off positively in a period in which no scan pulse is forwarded for securing drive stability and prevents a picture quality from becoming poor. The shift register in one embodiment includes stages having any one of first and second start pulses, and any one of first to fourth clock pulses to forward a scan pulse in succession, wherein the first and second start pulses are in gate high voltage states for two horizontal periods, with the second start pulse forwarded with a delay of one horizontal period than the first start pulse. The first to fourth clock pulses are in gate high voltages for two horizontal periods, with one horizontal period delay to one another.

A liquid crystal display device capable of reducing power consumption of a gate driving circuit and a method for driving the same are discussed. The liquid crystal display device includes a liquid crystal panel including pixel regions defined by gate lines and data lines, a timing controller for outputting a plurality of data control signals, a plurality of clock pulses and a start pulse, a time-divisional switching unit for time-dividing the plurality of clock pulses and outputting time-divisional clock pulses, a data driving unit for driving the data lines according to the plurality of data control signals, and a gate driving unit including a plurality of stages for sequentially outputting scan pulses according to the start pulse and the plurality of time-divisional clock pulses, wherein the stages receive the time-divisional clock pulses in units of blocks and each of the time-divisional clock pulses supplied to the blocks is different.

Liquid crystal display device and method for driving the same

A shift register which is capable of simultaneously driving gate lines is disclosed. The shift register includes a plurality of stages for simultaneously supplying all-drive signals to gate lines for an all-drive period and sequentially supplying scan pulses to the gate lines for a scan period.

A shift register is disclosed. The shift register includes a plurality of stages for sequentially outputting scan pulses, wherein each of the stages includes a scan pulse output unit controlled according to voltage states of a set node and reset node for outputting a corresponding one of the scan pulses and supplying the corresponding scan pulse to a corresponding gate line, a carry pulse output unit controlled according to the voltage states of the set node and reset node for outputting a carry pulse and supplying it to an upstream one of the stages and a downstream one of the stages, a first node controller for controlling the voltage states of the set node and reset node according to a carry pulse from the upstream stage, a carry pulse from the downstream stage and a first control signal externally supplied thereto, an all-drive signal output unit controlled according to voltage states of a control node and reset control node for outputting an all-drive signal and supplying it to the corresponding gate line, and a second node controller for controlling the voltage states of the control node and reset control node according to the voltage state of the set node, the voltage state of the reset node, and a start pulse and second control signal externally supplied thereto.

A gate driving circuit for a liquid crystal display device includes a plurality of shift register stages each including pull-up and pull-down transistors, wherein each of the pull-up and pull-down transistors is connected to a gate driving signal output terminal and controlled by voltages on first and second nodes, respectively, and wherein the pull-down transistors of a (2&#x2212;1)th shift register stage and a (2)th shift register stage are connected to each other; and a control signal generating unit alternately supplying one of first and second control signals to the pull-down transistors of the (2&#x2212;1)th and (2)th shift register stages and supplying the other of the first and second control signals to the pull-down transistors of the (2n+1)th and (2+2)th shift register stages, wherein n is an positive integer.

Growing community of inventors

Gumi-si, South Korea

Ji-Eun Chae