International Business Machines Corporation

Jessica Anne Levy

Thai Doan

James Albert Slinkman

Max Gerald Levy

Dinh Dang

Alan Frederick Norris

Jeffrey P Gambino

Qizhi Liu

Bucknell Chapman Webb

William Joseph Murphy

Cameron E Luce

Daniel Scott Vanslette

Marc Waine Cantell

Christa Regina Willets

A through silicon via with sidewall roughness and methods of manufacturing the same are disclosed. The method includes forming a via in a substrate and roughening a sidewall of the via by depositing material within the via. The method further includes removing a backside of the substrate to form a through via with a roughened sidewall structure.

Through silicon via wafer and methods of manufacturing

Disclosed is a transistor structure, having a completely silicided extrinsic base for reduced base resistance R. Specifically, a metal silicide layer covers the extrinsic base, including the portion of the extrinsic base that extends below the upper portion of a T-shaped emitter. One exemplary technique for ensuring that the metal silicide layer covers this portion of the extrinsic base requires tapering the upper portion of the emitter. Such tapering allows a sacrificial layer below the upper portion of the emitter to be completely removed during processing, thereby exposing the extrinsic base below and allowing the metal layer required for silicidation to be deposited thereon. This metal layer can be deposited, for example, using a high pressure sputtering technique to ensure that all exposed surfaces of the extrinsic base, even those below the upper portion of the emitter, are covered.

Transistor and method of forming the transistor so as to have reduced base resistance

A low resistance contact structure and method of making the structure. The structure includes a polysilicon contact through an upper silicon layer and buried oxide layer to a lower silicon layer of a silicon-on-insulation substrate. A region of the upper silicon layer surrounds the polysilicon contact and top surface of the polysilicon contact and surrounding region of upper silicon layer are metal silicided providing an extended contact area greater than the area of the top surface of polysilicon contact.

SOI substrate contact with extended silicide area

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Milton, VT, United States of America

Jessica Anne Levy