Adeia Semiconductor Bonding Technologies Inc.

University of California

Fluidigm Corporation

The United States of America As Represented by the United States

Ultracell Corporation

Jesse B Thompson

Belgacem Haba

Paul G Carey

Ilyas Mohammed

Wael Zohni

Masud Beroz

Giles Humpston

Yoichi Kubota

Stuart E Wilson

Ronald Patrick Green

Kenneth Alfred Williams

Nicolas J Colella

David Bazeley Tuckerman

Craig S Mitchell

Ian W Kaye

Michael James Nystrom

James L Kaschmitter

Michael Warner

Jason A A West

David Andrew Sopchak

Thomas W Sigmon

Jennifer E Brantley

Apolinar Alvarez, Jr

Kenneth J Newell

Randy C Aceves

Arpad Somogyvari

Joel B Truher

Hilda Cantor Tadio

Jason Aa West

Salvador A Tostado

Provided are microfluidic devices and methods for fabricating and bonding such devices. Also provided are kits for analyzing analyte-containing samples and for lysing cells.

Polymer microfluidic biochip fabrication

A tool is provided for applying a flowable composition onto a receiving surface. The tool includes a polyceramic coating on a surface thereof and may take the form of a stencil or mold. Also provided are an apparatus and a method that uses the tool. In use, the tool is placed such that its polyceramic-coated surface is in contact with the flowable composition, which, in turn, simultaneously contacts the receiving surface.

Polyceramic-coated tool for applying a flowable composition

The present invention relates to a camera module. The camera module includes a circuit panel having a top side, a bottom side and transparent region, the circuit panel having conductors. The module further includes sensor unit disposed on the bottom side of the circuit panel, and the sensor unit includes a semiconductor chip having a front surface including an imaging area facing in a forward direction in alignment with the transparent region and an imaging circuit adapted to generate signals representative of an optical image impinging on the imaging area. The module further includes posts protruding from the bottom side of the circuit panel, wherein at least some of the posts being engagement posts having bottom surfaces, and at least some of the bottom surfaces abutting an engagement surface of the sensor unit.

Pin referenced image sensor to reduce tilt in a camera module

In one embodiment, a fuel processor for use in a fuel cell system, may have a bottom plate, having a regenerator having a first inlet to receive an air flow, a burner flow chamber within the regenerator, the burner flow chamber having a second inlet to receive the air flow from the regenerator, and a reformer flow chamber positioned between the regenerator and the burner flow chamber, the reformer flow chamber having a third inlet to receive the air flow from the burner chamber, wherein the burner flow chamber and the reformer flow chamber is formed of a monolithic structure having an elongated, rounded baffle in the center of the monolithic structure. The fuel processor may also have a top plate coupled to the bottom plate to enclose the fuel processor, the top plate having a top surface and a bottom surface.

Fuel processor for use in a fuel cell system

A microelectronic assembly includes a microelectronic package having a microelectronic element with faces and contacts, a flexible substrate spaced from and overlying a first face of the microelectronic element, and a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, at least some of the conductive posts being electrically interconnected with the microelectronic element. The package includes a plurality of support elements disposed between the microelectronic element and the substrate and supporting the flexible substrate over the microelectronic element. At least some of the conductive posts are offset from the support elements. The assembly includes a circuitized substrate having conductive pads confronting the conductive posts of the microelectronic package, whereby the conductive posts are electrically interconnected with the conductive pads.

Microelectronic packages and methods therefor

A dielectric structure is formed by a molding process, so that a first surface of a dielectric structure is shaped by contact with the mold. The opposite second surface of the dielectric structure is applied onto the front surface of a wafer element. The dielectric layer may include protruding bumps and terminals may be formed on the bumps. The bumps may be of a precise height. The terminals lie at a precisely controlled height above the front surface of the wafer element. The terminals may include projecting posts which extend above a surrounding solder mask layer to facilitate engagement with a test fixture. The posts are immersed within solder joints when the structure is bonded to a circuit panel.

Microelectronic elements with compliant terminal mountings and methods for making the same

A microelectronic component having a base and a plurality of conductive posts extending from said base. Each of the posts is formed from a connected lattice of metal having voids therein. The lattice may be formed by depositing metal onto a sacrificial element such as an open-celled polymeric foam. During use or during processing, the posts may be deformed , as by crushing the lattice.

Microelectronic component with foam-metal posts

A microelectronic package includes a microelectronic element having faces and contacts and a flexible substrate spaced from and overlying a first face of the microelectronic element. The package also includes a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, wherein at least some of the conductive posts are electrically interconnected with the microelectronic element, and a plurality of support elements supporting the flexible substrate over the microelectronic element. The conductive posts are offset from the support elements to facilitate flexure of the substrate and movement of the posts relative to the microelectronic element.

Electrical interconnects for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb&mdash;Sn) no-clean fluxless solder cream, whereby the high breakage of thin (<6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb&mdash;Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value.

Process for electrically interconnecting electrodes

A solar cell module lamination process using fluoropolymers to provide protection from adverse environmental conditions and thus enable more extended use of solar cells, particularly in space applications. A laminate of fluoropolymer material provides a hermetically sealed solar cell module structure that is flexible and very durable. The laminate is virtually chemically inert, highly transmissive in the visible spectrum, dimensionally stable at temperatures up to about 200&deg; C. highly abrasion resistant, and exhibits very little ultra-violet degradation.

Solar cell module lamination process

Electrical interconnects for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb-Sn) no-clean fluxless solder cream, whereby the high breakage of thin (&lt;6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb-Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value.

Solar cell array interconnects

A method for producing beta silicon carbide thin films by co-depositing thin films of amorphous silicon and carbon onto a substrate, whereafter the films are irradiated by exposure to a pulsed energy source (e.g. excimer laser) to cause formation of the beta-SiC compound. Doped beta-SiC may be produced by introducing dopant gases during irradiation. Single layers up to a thickness of 0.5-1 micron have been produced, with thicker layers being produced by multiple processing steps. Since the electron transport properties of beta silicon carbide over a wide temperature range of 27.degree.-730.degree. C. is better than these properties of alpha silicon carbide, they have wide application, such as in high temperature semiconductors, including hetero-junction bipolar transistors and power devices, as well as in high bandgap solar arrays, ultra-hard coatings, light emitting diodes, sensors, etc.

Pulsed energy synthesis and doping of silicon carbide

A polycrystalline beta-silicon carbide film or coating and method for forming same on components, such as the top of solar cells, to act as an extremely hard protective surface, and as an anti-reflective coating. This is achieved by DC magnetron co-sputtering of amorphous silicon and carbon to form a SiC thin film onto a surface, such as a solar cell. The thin film is then irradiated by a pulsed energy source, such as an excimer laser, to synthesize the poly- or .mu.c-SiC film on the surface and produce .beta.--SiC. While the method of this invention has primary application in solar cell manufacturing, it has application wherever there is a requirement for an extremely hard surface.

Growing community of inventors

Brentwood, CA, United States of America

Jesse B Thompson