Boston Scientific Neuromodulation Corporation

Jess Weiqian Shi

Jordi Parramon

Emanuel Feldman

Goran Nils Marnfeldt

Paul James Griffith

Rafael Carbunaru

Joey Y Chen

Robert Dai Ozawa

Md Mizanur Rahman

Robert R Tong

David K L Peterson

Que T Doan

Yuping He

Daniel Aghassian

Kiran Nimmagadda

Mizanur Rahman

Goran Marnfeldt

David KL Peterson

A new architecture is disclosed for an IPG having a master and slave electrode driver integrated circuits (ICs). The electrode outputs on the ICs are wired together. Each IC can be programmed to provide pulses with different frequencies. Active timing channels in master and slave ICs are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other IC so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs

A method and system of providing therapy to a patient implanted with an array of electrodes is provided. A train of electrical stimulation pulses is conveyed within a stimulation timing channel between a group of the electrodes to stimulate neural tissue, thereby providing continuous therapy to the patient. Electrical parameter is sensed within a sensing timing channel using at least one of the electrodes, wherein the first stimulation timing channel and sensing timing channel are coordinated, such that the electrical parameter is sensed during the conveyance of the pulse train within time slots that do not temporally overlap any active phase of the stimulation pulses.

Method and device for acquiring physiological data during tissue stimulation procedure

A therapeutic neuromodulation system configured for providing therapy to a patient. The therapeutic neuromodulation system comprises a plurality of electrical terminals configured for being respectively coupled to a plurality of electrodes implanted within tissue, analog output circuitry configured for delivering therapeutic electrical energy between the plurality of electrical terminals in accordance with a set of modulation parameters that includes a defined current value, a voltage regulator configured for supplying an adjustable compliance voltage to the analog output circuitry, and control/processing circuitry configured for automatically performing a compliance voltage calibration process at a compliance voltage adjustment interval by periodically computing an adjusted compliance voltage value as a function of a compliance voltage margin. The control/processing circuitry may also be configured for automatically adjusting at least one of the compliance voltage adjustment interval and the compliance voltage margin during the compliance voltage calibration process.

System and method of adjusting the compliance voltage in a neuromodulation device

Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Pulse-by-pulse compliance voltage generation for an implantable stimulator

Electrode voltage monitoring circuitry for an implantable neurostimulator system having a plurality of electrode-driver integrated circuits (ICs) in provided. Electrodes from either or both ICs can be chosen to provide stimulation, and one of the IC acts as the master while the other acts as the slave. Electrodes voltages on the slave IC are routed to the master IC, and thus the master IC can monitor both electrode voltages on the slave as well as electrode voltages on the master. Such voltages can be monitored for a variety of purposes, and in particular use of such voltage is disclosed for determining the resistance between electrodes and to set a compliance voltage for stimulation.

Monitoring electrode voltages in an implantable medical device system having daisy-chained electrode-driver integrated circuits

An external charger for a battery in an implantable medical device and charging techniques are disclosed. Simulation data is used to model the power dissipation of the charging circuitry in the implant at varying levels of implant power. A power dissipation limit constrains the charging circuitry from producing an inordinate amount of heat to the tissue surrounding the implant, and duty cycles of a charging field are determined so as not to exceed that limit. A maximum simulated average battery current determines the optimal (i.e., quickest) battery charging current, and at least an optimal value for a parameter indicative of that current is determined and stored in the external charger. During charging, the actual value for that parameter is determined, and the intensity and/or duty cycle of the charging field are adjusted to ensure that charging is as fast as possible, while still not exceeding the power dissipation limit.

Efficient external charger for an implantable medical device optimized for fast charging and constrained by an implant power dissipation limit

Architectures for an implantable neurostimulator system having a plurality of electrode-driver integrated circuits (ICs) in provided. Electrodes from either or both ICs can be chosen to provide stimulation, and one of the IC acts as the master while the other acts as the slave. A parallel bus operating in accordance with a communication protocol couples the ICs, and certain functional blocks not needed in the slave are disabled. Stimulation parameters are loaded via the bus into each IC, and a stimulation enable command is issued on the bus to ensure simultaneous stimulation from the electrodes on both ICs. Clocking strategies are also disclosed to allow clocking of the master and slave ICs to be independently controlled, and to ensure that relevant internal and bus clocks used in the system are synchronized.

Architectures for an implantable medical device system having daisy-chained electrode-driver integrated circuits

Sample and hold circuitry for monitoring electrodes and other voltages in an implantable neurostimulator is disclosed. The sample and hold circuitry in one embodiment contains multiplexers to selected appropriate voltages and to pass them to two storage capacitors during two different measurement phases. The capacitors are in a later stage serially connected to add the two voltages stored on the capacitors, and voltages present at the top and bottom of the serial connection are then input to a differential amplifier to compute their difference. The sample and hold circuitry is particularly useful in calculating the resistance between two electrodes, and is further particularly useful when resistance is measured using a biphasic pulse. The sample and hold circuitry is flexible, and can be used to measure other voltages of interest during biphasic or monophasic pulsing.

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Winnetka, CA, United States of America

Jess Weiqian Shi