Motorola Corporation

Motorola Solutions, Inc.

Samsung Electronics Co., Ltd.

Qd Vision, Inc.

Jerzy Wielgus

Daniel Roman Gamota

Jie Zhang

John Szczech

Andrew Frederick Skipor

Tomasz L Klosowiak

Steven Michael Scheifers

Krishna Kalyanasundaram

Paul Brazis

Kin P Tsui

Abhijit Roy Chowdhuri

Paul W Brazis, Jr

Hakeem B Adewole

An apparatus is provided for modulating the photon output of a plurality of free standing quantum dots. The apparatus comprises a first electron injection layer () disposed between a first electrode () and a layer () of the plurality of free standing quantum dots. A hole transport layer () is disposed between the layer () of the plurality of quantum dots and a second electrode (). A light source () is disposed so as to apply light to the layer () of the plurality of free standing quantum dots. The photon output of the layer () of the plurality of free standing quantum dots is modulated by applying a voltage to the first and second electrodes (). Electrons excited to a higher energy state within layer () of the free standing quantum dots by the light source () are prevented from returning to a lower state by electrons from the electric field of the applied voltage, and therefore the free standing quantum dots are prevented from emitting a photon. The voltage source () may be modulated to vary the photon output.

Apparatus and method for modulating photon output of a quantum dot light emitting device

A method for delineating a metallization pattern in a layer of sputtered aluminum or sputtered copper using a broad spectrum high intensity light source. The metal is deposited on a polymeric substrate by sputtering, so that it has a porous nanostructure. An opaque mask that is a positive representation of the desired metallization pattern is then situated over the metallization layer, exposing those portions of the metallization layer intended to be removed. The masked metallization layer is then exposed to a rapid burst of high intensity visible light from an arc source sufficient to cause complete removal of the exposed portions of the metallization layer, exposing the underlying substrate and creating the delineated pattern.

Method to pattern metallized substrates using a high intensity light source

A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal layer is formed into entities. Each entity has a fracture initiating feature formed into it, which serves to initiate and/or direct a stress crack that is induced in the metal. The entities are fractured in a controlled manner by subjecting the substrate and the entities to mechanical stress by a rapid thermal excursion, creating a stress fracture in the entity extending from the fracture initiating feature. The stress fracture divides each entity into two or more sub-entities that are electrically isolated from each other by the stress fracture. The resulting structure can be used to form circuitry requiring very fine spaces for high density printed circuit boards. The rapid thermal stress may be induced by a high intensity, strobed xenon arc lamp.

Method and apparatus for providing electrically isolated closely spaced features on a printed circuit board

A method and apparatus for an irreversible temperature sensor for measuring a peak exposure temperature. The apparatus is fabricated by printing an admixture of conductive nanoparticles on a dielectric substrate to form a film. The film has an electrical resistance that is inversely proportional to the exposure temperature. The electrical resistance also irreversibly decreases as the exposure temperature of the film increases. A portion of the film is exposed to a pulse of electromagnetic energy sufficient to render it substantially more electrically conductive than the portion that was not exposed. In use, the peak exposure temperature is determined by measuring the electrical resistance of the non-altered portion of the film and the electrical resistance of the portion that was exposed to the pulse of electromagnetic energy, and subtracting the electrical resistance of the altered portion from the electrical resistance of the portion that was not altered, to provide a difference value. The peak exposure temperature is then be calculated as a function of the difference value.

Method and apparatus for a temperature sensor for measuring peak temperatures

A protective photochromic barrier film for a light-sensitive printed electronic substrate. Light-sensitive semiconductor devices on a dielectric substrate are electrically connected by conductors. A barrier layer containing photochromic dyes covers some or all of the light-sensitive semiconductor devices. Upon exposure to visible, infrared, or ultraviolet light, the photochromic dyes change chemical structure and decrease the amount of visible or non-visible light that can impinge upon the light-sensitive electronic devices. Upon removal of the visible or non-visible light, the photochromic dyes either revert to their original structure or maintain their altered state.

Printed electronic substrate havine photochromic barrier layer

Two or more semiconductor devices (and) are formed on a substrate () and are each comprised of a plurality of printed components (and). At least one such printed component () is shared by both such semiconductor devices.

Semiconductor devices shared element(s) apparatus and method

An organic field effect transistor utilizes a bifunctional contact-enhancing agent at various interfaces to improve carrier mobility through the organic semiconductor layer, to improve carrier injection, and to enhance adhesion via a bifunctional mechanism. The contact-enhancing agent can be situated between the gate electrode () and the dielectric layer () to form a chemical or physical bond between the gate electrode and the dielectric layer. It can also be situated between the dielectric layer and the organic semiconducting layer (), or between the source and drain electrodes () and the organic semiconducting layer.

Organic contact-enhancing layer for organic field effect transistors

An integrated circuit ( ) that includes a field effect transistor ( ) is fabricated by forming an organic semiconductor channel ( ) on one substrate ( ), forming device electrodes ( ) on one or more other substrates ( ), and subsequently laminating the substrates together. In one embodiment, a dielectric patch ( ) that functions as a gate dielectric is formed on one of the substrates ( ) prior to performing the lamination. Lamination provides a low cost route to device assembly, allows for separate fabrication of different device structures on different substrates, and thins various device layers resulting in improved performance.

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Mount Prospect, IL, United States of America

Jerzy Wielgus