Computer Automation, Inc.

Ncr Corporation

Jerry R Washburn

Phillip A Kaufman

Roy S Nutter

Victor A Wagner, Jr

Donald W Goodrich

Michael L Saccomano

John H Verwys

Paul A Stapinski

An improved distributed input/output system is disclosed for controlling numerous high speed peripheral devices (both low speed, medium speed, and high speed) and the transfer of data signals, status signals, and control signals between those devices and a general purpose digital computer. The control system described includes a direct-memory-access multiplexer which can accommodate a plurality of low or medium-speed input/output services and also high-speed input/output devices under the control of separate programmable microcoded peripheral-unit controllers. The direct-memory-access multiplexer of this invention is fully compatible with controllers that can also be used with an indirect-memory access multiplexer. Each controller, being an element of a distributed system, is adapted to be located at an individual peripheral device and each is connected to the multiplexer by an identical ribbon cable. The direct-memory-access multiplexer employs a microengine, that is, a microcoded processor, and an arithmetic logic circuit to simulate operations of a computer's central processor unit. The peripheral-unit controllers may be configured somewhat differently depending upon whether the peripheral device utilizes data signals in a parallel format or in a series format. Data is transferred directly between a computer memory unit and the periperhal devices without requiring the use of any computer working registers, without requiring subroutines to store data and status signals of an ongoing main program that is temporarily halted and without involving operations of the central processor unit. Each peripheral-device controller can issue interrupt signals which are processed on a priority basis when they occur simultaneously.

Distributed input/output controller system

A special broadcast communication link is provided between a central processing unit and plural computer peripheral devices, the communication link being in addition to normal data and addressing communication lines, and providing a distributed control channel which is used to inhibit selected classes of interrupt signals from controllers associated with the peripheral devices in accordance with an interrupt classification system. This communication channel permits the central processing unit to issue a data command which selectively inhibits the peripheral devices from issuing selected classes of interrupt signals.

Remote distributed interrupt control for computer peripherals

The input/output system for a computer of this invention permits a peripheral device and its associated peripheral processor to be connected either (a) directly to the central processor unit of the computer, or (b) to a remote hardware peripheral control device which permits the central processor unit to directly control the peripheral processor, or (c) to a remote input/output controller which controls the peripheral processor independently of the central processor unit of the computer. The input/output system of this invention permits the use of the same software set stored in memory to control the input/output operations of a selected peripheral device regardless of where the peripheral device is connected.

Integrated and distributed input/output system for a computer

A distributed input/output system is disclosed for controlling numerous peripheral devices and the transfer of data signals and control signals between those devices and a general purpose digital computer. The control system described includes a multiplexer which can accommodate as many as eight input/output devices under the control of separate programmable microcoded peripheral-unit controllers. Each controller is adapted to be located at or on an individual peripheral device and each is connected to the multiplexer by an identical ribbon cable that is employed to carry both signals and power. Each controller employs a substantially identical microengine, that is, a microcoded processor, currently of five integrated circuit chips. The peripheral-unit controllers may be configured somewhat differently depending upon whether the peripheral device utilizes data signals in parallel or in series. Data may be transferred directly between a computer memory unit and the peripheral devices without requiring the use of any computer working registers and without requiring subroutines to preserve an ongoing main program. Each peripheral-device controller can issue interrupt signals which are processed by the computer on a priority basis when they occur simultaneously. Some microengines employ two sets of programmed microcodes and each set is selectable by a switch, such as a wire jumper, for controlling either of two different kinds of devices.

Peripheral-unit controller apparatus

A distributed input/output system is disclosed for controlling numerous peripheral devices and the transfer of data signals and control signals between those devices and a general purpose digital computer. The control system described includes a multiplexer which can accommodate as many as eight input/output devices under the control of separate programmable microcoded peripheral-unit controllers. Each controller is adapted to be located at or on an individual peripheral device and each is connected to the multiplexer by an identical ribbon cable that is employed to cary both signals and power. Each controller employs a substantially identical microengine, that is, a microcoded processor, currently of five integrated circuit chips. The peripheral-unit controllers may be configured somewhat differently depending upon whether the peripheral device utilizes data signals in parallel or in series. Data may be transferred directly between a computer memory unit and the peripheral devices without requiring the use of any computer working registers and without requiring subroutines to preserve an ongoing main program. Each peripheral-device controller can issue interrupt signals which are processed by the computer on a priority basis when they occur simultaneously. Some microengines employ two sets of programmed microcodes and each set is selectable by a switch, such as a wire jumper, for controlling either of two different kinds of devices. The multiplexer of this invention includes circuits for forcing the truth value of a selected data signal to a predetermined level and for recognizing a particular data term for terminating data transfer operations. These capabilities are especially useful for data signals that include a parity bit and for data signals that represent an alphanumeric character.

Multiplexer for a distributed input/out controller system

A priority network utilizing a common bus coupled to a plurality of priority seeking peripheral devices wherein a processor or any number of processors is connected to the common bus. Each successive peripheral device is connected to the common bus in increasing priority order, such that each device will have a unique priority defined. Each peripheral device is provided with an associated peripheral control unit. Each of the peripheral control units is connected in serial fashion on an enabling line with the output of the higher priority control unit providing an enabling input to the next lowest priority peripheral control unit, such that the highest priority device requesting bus access prevents all lower priority devices from gaining access to the common bus until the higher priority device has completed its data transfer.

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Alhambra, CA, United States of America

Jerry R Washburn