American Microsystems, Inc.

Jerry R Bauer

The addresses of firmward (ROM) being interrogated to ascertain data are continuously monitored. Selected key addresses are recognized by address detection means. Timing means is then actuated to count a preset number of address accesses, system clock cycles, or other suitable timing means. A substitute address is provided to the firmware when the timer counts down. If the incoming address is in the correct sequence then the substituted address will be the same as the incoming address and correct data will be provided by the ROM. Otherwise, incorrect data will be provided. Alternately, after countdown the incoming address can be compared with the expected incoming address. If the comparison indicates identity then the incoming address can be supplied to the firmware. Otherwise, an incorrect substitute address can be provided to the input of the firmware or incorrect substitute data can be provided on the output of the firmware. In all versions correct data will only be provided if the firmware is interrogated in the correct address sequence.

State sequence dependent read only memory

The present apparatus provides for the encoding of data carried on bus lines running between integrated circuits in order to protect the data carried upon those bus lines, with encoding and decoding circuits included for providing those functions in regard to the data on the bus lines.

ROM Protection scheme

An encoding interface is provided between input data ports and strobe output ports of a (semiconductor integrated) circuit (chip) and an array of switches (40) is connected to a series of L input data lines and output lines (31-38), whereby the L lines can alternatively strobe the switch matrix to determine the (50) position of each switch. By having each line function either as an input line or an output line at a particular instant of time, the number of switches being served by a fixed number of total input and output lines is increased. For example, with eight total lines 28 switches are accommodated when the lines function either as input or output lines while when four separate lines are dedicated as input lines and four other lines dedicated as output lines only 16 switches are accommodated. In a further embodiment using two switches and a pair of oppositely disposed diodes at each cross point in the matrix the number of switches can be doubled (to 56 with eight dual input/output lines).

Growing community of inventors

San Jose, CA, United States of America

Jerry R Bauer