Koninklijke Philips Corporation N.v.

Nxp B.v.

Vlsi Technology, Inc.

Philips Semiconductor, Inc.

Jerry Michael Rose

David R Evoy

Franklyn H Story

D C Sessions

Kenneth A Jaramillo

Paul Reeves Auvil, Iii

Single hardware subsystems that present two software views that appear to be two separate hardware subsystems attached in a hierarchy are implemented with PCI arrangements. In an embodiment, a hardware arrangement is configured to emulate two virtually separate hierarchical subsystems in a single hardware block. This emulation facilitates the coupling of devices to PCI Express communications links while addressing PCI-Express linking requirements for such devices.

Simulation circuit of PCI express endpoint and downstream port for a PCI express switch

A low pin count, moderate speed serial data bus that has a variable width for the transfer of data between devices of a computer system. The serial data bus can be selectively configured to be 1-bit, 4-bit, 8-bit or 16-bit wide. Data (including bus commands and addresses) carried by wider parallel buses are serialized into data blocks, which are then transferred by the serial data bus at a high speed. One feature of the present invention is that the pin count requirement for the present invention is low: only four control pins are required for controlling the data transfer mechanisms of the data bus. Another significant feature of the present invention is that the host and companion interfaces of the serial data bus can have non-matching widths. To allow for host and companion interfaces with non-matching widths, an initialization protocol is used to establish the effective width of the data bus at power-on reset.

System bus with a variable width selectivity configurable at initialization

An electronic device for receiving infra-red inputs from remote units and propagating the inputs to an intelligent controller circuit. In one embodiment, the present invention receives the infra-red energy emitted from different remote units in a single infra-red receiver circuit. This embodiment then generates digital data signals responsive to the infra-red energy, and propagates the digital data signals through a single external single-pin bus to an integrated circuit. The integrated circuit contains circuitry therein to decode control signals from a variety of different remote units. In this embodiment, the integrated circuit's internal bus is coupled to the single external single-pin bus. The internal bus is commonly coupled to all remote control decoder circuits within the integrated circuit. In this embodiment, the integrated circuit decodes keyboard digital data signals into keyboard control signals for the intelligent controller unit, mouse digital data signals into mouse control signals for the intelligent controller unit, and remote control digital data signals into remote-control control signals for the intelligent controller unit. By integrating the decoder circuits into a single integrated circuit and by sharing a single external bus for the remote control signals, significant size reductions are provided for set-top-boxes and other electronic devices.

Combining input/output paths for infra-red remote device inputs

An improved memory addressing system has a CPU having both an address bus and a multiplexed data/address bus. A reduced PIN out companion chip is coupled to the multiplexed data/address bus for decoding data and low order address information. Memory storage is coupled to a high order address bus for receiving a high order address from the CPU, and to the low order address bus and data bus for receiving decoded low order address and data information from the companion chip.

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Phoenix, AZ, United States of America

Jerry Michael Rose