Nxp Usa, Inc.

Freescale Semiconductor,inc.

Motorola Corporation

Jerry Lynn White

Audel Sanchez

Fernando A Santos

Lakshminarayan Viswanathan

Li Li

Mahesh K Shah

Hussain Hasanali Ladhani

David James Dougherty

Frank Danaher

Aruna Manoharan

Hamdan Ismail

Margaret A Szymanowski

Jerry D Cripe

L Mali Mahalingam

Sarmad K Musa

Carl Emil D'Acosta

Russell Thomas Lee

Overmolded microelectronic packages containing knurled base flanges are provided, as are methods for producing the same. In various embodiments, the overmolded microelectronic package includes a molded package body, at least one microelectronic device contained in the molded package body, and a base flange to which the molded package body is bonded. The base flange includes, in turn, a flange frontside contacted by the molded package body, a device attachment region located on the flange frontside and to which the at least one microelectronic is mounted, and a knurled surface region. The knurled surface region includes a first plurality of trenches formed in the base flange and arranged in a first repeating geometric pattern. The molded package body extends or projects into the first plurality of trenches to decrease the likelihood of delamination of the molded package body from the base flange.

Overmolded microelectronic packages containing knurled flanges and methods for the production thereof

An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.

Packaged electronic devices with top terminations

Methods of manufacturing packaged electronic devices with top terminations

Packaged electronic devices with top terminations, and methods of manufacture thereof

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

Radio frequency devices with surface-mountable capacitors for decoupling and methods thereof

An embodiment of a packaged radio frequency (RF) device includes a device substrate with a voltage reference plane, a first input lead coupled to the device substrate, a first output lead coupled to the device substrate, a first transistor die coupled to a top surface of the device substrate with a solder bond, a second die coupled to the top surface of the device substrate with a conductive epoxy that electrically couples at least one component of the second die to the voltage reference plane, and non-conductive molding compound over the top surface of the device substrate and encompassing the first transistor die, the second die, a portion of the first input lead, and a portion of the first output lead.

Packaged RF amplifier devices and methods of manufacture thereof

A method for performing failure analysis on a semiconductor device under inspection includes preparing of a device sample using an encapsulation material containing a dye, the prepared device sample possibly including a failure area having wicked in encapsulation material containing the dye. The prepared device sample is then sectioned to facilitate viewing a cross section face of the device under inspection. Lastly, a dark field analysis on the prepared device sample is performed with the use of dark field illumination. Responsive to at least one failure area containing wicked in encapsulation material with dye occurring on the cross section face of the device under inspection, the failure area can be readily identified as well as a contrast and perspective of remaining portions of the cross section face being maintained.

Method and apparatus for performing failure analysis with fluorescence inks

A method of etching a semiconductor substrate (11) includes thinning (102) the semiconductor substrate (11), providing (103) a support layer (30) for the semiconductor substrate (11), providing (104) an etch mask (28) over the semiconductor substrate (11), and etching (105) the semiconductor substrate (11) using an etchant mixture of hydrofluoric acid, nitric acid, phosphoric acid, sulfuric acid, and a wetting agent at a temperature below ambient. The method is capable of using one etch step (105) and one etch mask (28) to form a plurality of trenches (12, 13) having the same width (15, 17) but different depths (16, 18) and different orientations. The method can be used to singulate different sizes and configurations of semiconductor dice from the semiconductor substrate (11).

Method of etching a semiconductor substrate

A method of fabricating a resistive conductive pattern on an aluminum nitride substrate includes forming a resistive chromium containing film on the aluminum nitride substrate and then forming a refractory metal layer on the resistive film. The resistive film and refractory metal layer are then patterned and one or more conductive layers may then be formed on the patterned refractory metal layer. Resistors may then be formed between conductive lines patterned from the layers. These resistors are formed from the resistive film.

Method of fabricating resistive conductive patterns on aluminum nitride

Growing community of inventors

Glendale, AZ, United States of America

Jerry Lynn White