Delphi Technologies, Inc.

Delco Electronics Corporation

Jerral A Long

Scott Birk Kesler

Glenn A Walker

Raymond O Butler, Jr

Michael Joseph Huemmer

Eric A Dibiaso

Michael L Hiatt, Jr

Ronald J Kiess

Philip Allen Karau

Stephen P Barlow

John R Fruth

Imtiaz Zafar

Joseph R Dockemeyer, Jr

Robert W Koseluk

William E Dyson

A receiver system and method for switching among a plurality of antenna elements to receive a signal. At least a portion of plurality of antenna elements receive a transmitted signal, such that the transmitted signal includes a plurality of sub-channels that are transmitted in predetermined time intervals. A switching device is in communication with the plurality of antenna elements, and switches among single antenna elements to receive the transmitted signal. A controller is in communication with the switching device, and commands the switching device to select each of the antenna elements separately in predetermined periods of time based upon the predetermined time intervals of each of the sub-channels. A power level of the transmitted signal is determined during the predetermined period of time that corresponds to the predetermined time intervals, and the controller commands the switching device to switch to an antenna element based upon the determined power level.

Receiver system and method for switching among a plurality of antenna elements to receive a signal

A satellite-based digital audio radio (SDAR) receiver is configured to temporarily store data that may be transmitted to the SDAR receiver at a time inconvenient to the subscriber. A memory arrangement buffers data output by a channel decoder. The SDAR receiver can use the buffered data prior to using any currently transmitted data. The buffered data is associated with buffered timing information that lags behind the current timing information associated with the currently transmitted data. The buffered data is available for use only once before a decryption subsystem receives the current timing information. If the subscriber uses the currently transmitted data, the decryption subsystem receives the current timing information. The decryption subsystem decrypts only data that is associated with timing information that is no earlier than the latest timing information received by the decryption subsystem. Accordingly, the buffered data becomes unavailable once the decryption subsystem receives the current timing information.

Time-shifting data in digital radio system

A satellite antenna module is disclosed. The satellite antenna module includes at least one antenna element disposed on a ground plane. The ground plane is capacitivly coupled to a vehicle surface. The ground plane is disposed over the vehicle surface at an elevation angle that achieves a higher gain of the at least one antenna element.

Satellite diversity antenna system

An ignition control circuit () is responsive to a control signal (ESTC) to apply a drive signal (GD) to a power switching device () to conduct ignition coil current (I) therethrough. A resistor (R) included within the circuit () receives, and dissipates heat generated by, the coil current (I). The circuit () includes a first transistor (Q) positioned adjacent to the resistor (R) such that an operating temperature thereof is near that of the resistor (R), and a second transistor (Q) positioned remote from the resistor (R) and having an operating temperature defining a reference temperature. The first and second transistors (Q, Q) are configured to produce an output voltage (V) proportional to a difference in operating temperatures thereof, and a latch circuit (L) disables the control signal (ESTC) to thereby turn off the power switching device () when the output voltage (V) difference exceeds a reference voltage (V).

Over-dwell protection circuit for an automotive ignition control system

An impulse noise suppression circuit for an integrator-based ion current signal processing system includes a one-shot circuit activated by a trigger signal that is produced when a noise transient in a bandpass filtered ion current signal exceeds a predetermined threshold. The output pulse of the one-shot circuit is selected to have a pulse width configured to mask a substantial portion of the noise transient without masking the remaining filtered ion current signal during the remainder of a knock window in which knock is detected.

System and method for impulse noise suppression for integrator-based ion current signal processor

A transient protection circuit (,) includes a resistor (,) having a first end adapted for connection to a first signal line (,) of a voltage supply (,) and a second opposite end connected to a voltage supply input (,) of an application circuit (,). In one embodiment, the resistor (,) defines an emitter (,) of a PNP transistor (,) having a floating base (,) and a collector (,) adapted for connection to a reference signal line (,) of the voltage supply (,). In an alternative embodiment (,&prime;), the emitter (,) of the PNP transistor (,) is connected to the first end of the resistor (,). The transient protection circuit (,&prime;) is preferably formed on a monolithic integrated circuit including the application circuit (,) wherein a semiconductor layer (,) defining the first input to the resistor (,) also defines a bond pad (,). The corners of the semiconductor layer (,) including those of the bond pad (,) are configured to equalize the electric field about the entire outer periphery of the semiconductor layer (,). The transient protection circuit (,&prime;) is operable to protect the application circuit (,) from transient and other fault conditions associated with the voltage supply (,) including transient voltage spikes, load dump conditions, electrostatic discharge (ESD) events, reverse battery conditions and discharge events from an ignition coil secondary.

Input protection circuit for a semiconductor device

Circuitry for driving an electrical load (,) and regulating a load current (IL) therethrough includes a multiple output load driving device (,) having an input (,) receiving a gate drive signal (GD) thereat and operable to direct the load current (I,) therethrough from a collector (,) to main (,) and sense (,) outputs thereof. A control circuit is provided including an error amplifier (,) having a non-inverting input operable to receive a reference voltage and an inverting input operable to receive a sense voltage proportional to the portion of load current (I,) flowing through the sense output (,) of the load driving device (,), and producing an output based thereon to which a gate drive control circuit (,) is responsive to supply the gate drive signal (GD). A feedback capacitor (CFB) is disposed between the collector (,) of the load driving device (,) and a resistor string (R,R,RTRIM) establishing the reference voltage, and provides an AC coupling therebetween. This AC coupling compensates for oscillations in the load current (I,) during load current regulation operation and therefore provides for a stable load current (I,) during such operation. In accordance with another aspect of the present invention, the feedback capacitor (CFB) is advantageously formed with an IGBT (,) on a single monolithic integrated circuit.

Circuitry for maintaining a substantially constant sense current to load current ratio through an electrical load driving device

A semiconductor power device (100) that includes active cells in an interior region of an epitaxial layer (16) on a semiconductor substrate (12), and an edge termination structure that surrounds the cells and separates the cells from the die edge (48). A polysilicon layer (26) overlies and is electrically insulated from the epitaxial layer (16), a gate metal field plate (36) contacts the polysilicon layer (26), and a portion of the polysilicon layer (26) forms a gate for each cell. Each of the active cells also has a collector/anode terminal formed by the substrate (12), an emitter/cathode terminal formed by a well (18), emitter diffusion (20) and emitter metal (22), and a base formed by the epitaxial layer (16). The edge termination structure includes a first well (34) of a first conductivity type underlying the polysilicon layer (26) and completely surrounding the active cells, a second well (30) of an opposite conductivity completely surrounding the first well (34), and metallization (42) contacting the second well (30). The first well (34) is part of a low-voltage ring (28) while the second well (30) is part of a high-voltage ring. The wells (30, 34) are preferably spaced relative to each other and to the device edge (48) to provide ballast resistance through the epitaxial layer (16), such that a breakdown will not be able to generate enough localized current to damage or destroy the device (100) when a reverse power pulse is experienced.

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Kokomo, IN, United States of America

Jerral A Long