Gvbb Holdings S.a.r.l

Thomson Licensing

Grass Valley Canada

Thomon Licensing

Jeroen Rotte

Juul Josephus Johannes Van Den Heijkant

Rik Visser

Petrus Gijsbertus Centen

Petrus Gijsbertus Maria Centen

Heinrich Schemmann

Steffen Lehr

Sabine Roth

Nicolaas Johannes Damstra

Peter Centen

Dirk Snoeck-Henkemans

Chris Kuppens

Patrick Vogel

Rudolf Van Ree

Friedrich Heizmann

Volker Neiss

Jerry Roctus

Klaas Jan Damstra

Jan Van Rooy

Reinhard Weber

John Hommel

Ruud Van Ree

Peter Vissers

Arnaud Defernez

Karl-Heinz Schaaf

Neil Mallory

Richard John Everitt

Pepijn Kampf

Rob Voet

Juul Van Den Heijkant

Machiel Boneschanscher

Nikolaas Johannes Damstra

A system and method is provided for performing high dynamic range digital double sampling. More particularly, a CMOS image sensor is provided that includes a pixel array with each pixel sampling both dark and bright values for digital double sampling. After the sampled signals are digitized, a mean dark value is determined and each dark value is further fed to a lookup table that generates an output value taking into account whether the pixel has been saturated. In over exposed conditions, the lookup table will generate a negative value output to eliminate image artifacts. All three values are fed to adder logic circuit that subtracts the mean dark value and the lookup table output from the bright value. This resulting output is fed to a video viewer.

System and method for high dynamic range digital double sampling

An imaging system is provided that includes a pixel array having a plurality of columns with rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. Moreover, the system includes row driver circuitry that control the pixel array for pixel addressing and readout, such that the respective accumulation voltages of the photodiodes is read out on a readout channel coupled to a bit line column, and a hybrid multiplexer that multiplexes and routes output signals from the pixel array to a video imaging device to be displayed thereon.

Hybrid output multiplexer for a high framerate CMOS imager

An imager that includes a pixel array with a plurality of columns having rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. The imager further includes row driver circuitry that controls the pixel array for pixel addressing and readout, with the row driver circuitry including a plurality of shift registers, and an image sensor controller that controls the plurality of shift registers to address the rows of pixels in the pixel array. Moreover, the row driver circuitry dynamically upward and downward shifts control signals to the pixel array, such that two rows of pixels in a single column of the pixel array are addressed during a single row time.

Imager with vertical row addressing

An image processor is provided for correcting brightness of saturated pixels of a captured image. The image processor can include a pixel saturation determiner that whether one or more pixels in an image sensor have been saturated by comparing pixel brightness levels of the pixels to a predetermined saturation threshold. Moreover, the image processor includes an image enhancer that generates a corrected image without artifacts due to the saturated pixel(s) by replacing the pixel brightness of the saturated pixel(s) with a pixel correction value that is based on a pixel brightness of one or more unsaturated pixel in the image sensor.

Brightness correction of a pixel array in an image sensor

An apparatus for HDR image processing is provided. The apparatus determines an imaging sensitivity value. The apparatus then compares subsets of imaging information with the determined imaging sensitivity value and applies a gamma correction to each subset of imaging information using a gamma low contrast curve or a gamma high contrast curve based on the comparison to obtain the gamma corrected subset of imaging information.

High dynamic range processing

A method for performing differential double sampling and a CMOS image sensing device for performing the same. In one example, the CMOS image sensing device includes a pixel array include a multitude of pixels with each pixel formed by a plurality of photodiodes, a floating diffusion point and a plurality of transistors electrically coupled the plurality of photodiodes. Moreover, a column readout circuit with four storage capacitors is selectively coupled to the pixel array by switches so that the storage capacitors can store sampled pixel values. A control circuit connected to the pixel array and the column readout circuit selectively activates the transistors to output to the column readout circuit sampled dark value and bright values of one photodiode and a sampled double bright value of the one photodiode and one additional photodiode.

Differential digital double sampling method and CMOS image sensor for performing same

An image sensor is provided. In one aspect, the image sensor includes a pixel coupled to an output line. The pixel includes a photodiode configured to generate electrical charges in response to light and a supply circuit configured to supply a voltage to the photodiode to keep a voltage of the photodiode at or above a threshold level in an integration time. In another aspect, the pixel includes a supply circuit configured to selectively supply voltage to the photodiode in a first charge holding capacity and a second charge holding capacity.

Photodiode limiter

An image sensor that provides global shutter scanning with exposure time control during image capture. The image sensor includes a pixel array with shared pixel units that each include four photodiodes with a floating diffusion node shared therebetween and respective global shutter gates disposed between each photodiode and a supply voltage of the pixel array. Moreover, an image capture timing controller controls an exposure time of each photodiode by adjusting a width of a global shutter reset pulse applied to the plurality of global shutter gates after each readout cycle during image capture to change the respective exposure time of each shared pixel unit.

Shared photodiode reset in a 5 transistor-four shared pixel

A CMOS image sensor with reducing interconnections is provided. The CMOS image sensor may include a first row of pixels that includes a first pixel. The first pixel may include a first plurality of photodiodes and a first plurality of transfer gates. Each of the first plurality of photodiodes may be associated with a corresponding one of the first plurality of transfer gates. The CMOS image sensor may include a second row of pixels that includes a second pixel. The second pixel may include a second plurality of photodiodes and a second plurality of transfer gates. Each of the second plurality of photodiodes may be associated with a corresponding one of the second plurality of transfer gates. A first one of the transfer gates of the first plurality of transfer gates may be coupled to a first one of the transfer gates of the second plurality of transfer gates.

Cross pixel interconnection

Growing community of inventors

Breda, Netherlands

Jeroen Rotte