Spreadtrum Hong Kong Limited

Jeremy L Branscome

A system for predicting latency of at least one variable-latency instruction, wherein a microprocessor includes at least one pipeline, the at least one pipeline having an instruction stream. The microprocessor is configured to issue at least one dependent instruction, execute the at least one pipeline to serve at least one variable-latency instruction, generate a result of the at least one variable-latency instruction, and serve the at least one dependent instruction by using the result of the at least one variable-latency instruction.

System and method for predicting latency of a variable-latency instruction

A device for executing conditional instructions is provided. The device includes one or more processors and a memory unit including a plurality of registers storing at least a predicate instruction and a conditional instruction, executable by the one or more processors. Execution of the conditional instructions is predicated on execution results of the predicate instruction. The one or more processors are configured to extract predicate-determining information of the predicate instruction and conditional instruction information of the conditional instruction; predict execution results for the predicate instruction and the conditional instruction based on the predicate-determining information and the conditional instruction information; and execute the predicate instruction and the conditional instruction in parallel, based on the predicted execution results for the predicate instruction and the conditional instruction.

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San Jose, CA, United States of America

Jeremy L Branscome