Intel Corporation

Other

Jeremy J Shrall

Stephen H Gunther

Avinash N Ananthakrishnan

Krishnakanth Venkata Sistla

Efraim Rotem

Ryan Donovan Wells

Eliezer Weissmann

Ankush Varma

Anil Aggarwal

Guy M Therien

Martin Rowland

Xiuting C Man

Shaun M Conrad

Anupama Suryanarayanan

Paul S Diefenbaugh

Andrew D Henroid

Sanjeev S Jahagirdar

Eric J DeHaemer

Jay D Schwartz

Chinmay Ashok

Jason W Brandt

Alon Naveh

Inder M Sodhi

Eric DiStefano

Ian M Steiner

Anant S Deval

Matthew M Bace

Chris Poirier

Doron Rajwan

Eric C Samson

Robert J Greiner

Edward Allyn Burton

Hang T Nguyen

Devadatta V Bodas

Vasudevan Srinivasan

Nicholas J Adams

Daniel J Ragland

Tawfik M Rahal-Arabi

Venkatesh Ramani

Thi Dang

Krishna K Rangan

Cyprian W Woo

James G Hermerding, Ii

Vivek Garg

Michael N Derr

Dorit Shapira

Douglas Robert Huard

Benson D Inkley

Don Soltis

Ameya Ambardekar

Eric R Heit

Arun R Ramadorai

Deepak Ganapathy

Craig Topper

Joseph M Alberts

Martin M Chang

Michael A Rothman

Mohan J Kumar

Martin Guy Dixon

Stephan Jourdan

Harry G Skinner

Robert E Gough

Sarathy Jayakumar

Mark Doran

Viktor D Vogman

Jose Andy Vargas

Rajesh S Parthasarathy

Ketan R Shah

Malini Krishnan Bhandaru

Michael W Chynoweth

Michael Cornaby

Rajshree Chabukswar

Neelam Chandwani

Edward R Stanford

Ramadass Nagarajan

Brian J Griffith

Dawson Kesling

Erik Hallnor

Vinit Mathew Abraham

Takao Oshita

Amir Ali Radjai

Joseph R Doucette

Seongwoo Kim

Avinash N Ananthakrishan

Ray Ramadorai

Don C Soltis, Jr

Hames Hermerding, Ii

Ezra N Harrington

Travis C Furrer

Shuan M Conrad

Eliezer Wiessmann

Steven H Gunther

Alvin Shing Chve Goh

Christopher A Poirier, Sr

Dawson W Kesling

An apparatus is provided, where the apparatus includes a plurality of components, wherein an individual component has a corresponding throttling priority of a plurality of throttling priorities. The apparatus further includes logic to selectively throttle one or more of the plurality of components. In an example, an order in which the one or more of the plurality of components are to be throttled may be based on the plurality of throttling priorities.

Throttling of components using priority ordering

In one embodiment, a processor includes: a plurality of cores; a first storage to store parameter information for a voltage regulator to couple to the processor via a voltage regulator interface; and a power controller to control power consumption of the processor. The power controller may determine a performance state for one or more cores of the processor and include a hardware logic to generate a message for the voltage regulator based at least in part on the parameter information, where this message is to cause the voltage regulator to output a voltage to enable the one or more cores to operate at the performance state. Other embodiments are described and claimed.

Techniques to enable communication between a processor and voltage regulator

The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.

Collaborative processor and system performance and power management

In one embodiment, a processor includes a plurality of cores and a power controller. This power controller in turn may include a voltage ramp logic to pre-empt a voltage ramp of a voltage regulator from a first voltage to a second voltage, responsive to a request for a second core to exit a low power state. Other embodiments are described and claimed.

Processor to pre-empt voltage ramps for exit latency reductions

A processor includes processing engines, at least one performance counter, and a power control circuit. The at least one performance counter is to determine at least one interrupt rate metric for a first processing engine. The power control circuit is to determine, using the at least one performance counter, whether the at least one interrupt rate metric has reached a first threshold while the first processing engine is operating at a first frequency level, and in response to a determination that the at least one interrupt rate metric has reached the first threshold while the first processing engine is operating at the first frequency level, increase an operating frequency of the first processing engine from the first frequency level to a second frequency level.

Modifying processor frequency based on interrupt rate

In an embodiment, a processor includes at least one execution unit to execute instructions, and an interrupt generation unit. The interrupt generation unit may be to: receive a plurality of values indicating thermal status values for a memory unit at multiple points in time across a first time window; determine a running average value based on the plurality of values indicating thermal status values in the memory unit; and in response to a determination that the running average value has exceeded a high thermal status threshold value, generate a thermal interrupt indicating a high thermal status event in the processor. Other embodiments are described and claimed.

Generation of processor interrupts using averaged data

According to one embodiment of the invention, a processor includes a power control unit, an interface to software during runtime that permits the software to set a plurality of power management constraint parameters for the power control unit during runtime of the processor without a reboot of the processor, and a storage element to store a respective lock bit for each of the plurality of power management constraint parameters to disable the interface from changing a respective constraint parameter when set.

System, method and apparatus for energy efficiency and energy conservation by configuring power management parameters during run time

In an embodiment, a processor includes a first power rail, a first component coupled to the first power rail, and a compensation control unit. The compensation control unit is to: detect a request to change a voltage level of the first power rail by a first voltage change amount; in response to detecting the request, determine that the first voltage change amount exceeds a first threshold level associated with the first component; and in response to determining that the first voltage change amount exceeds the first threshold level, initiate a first compensation action prior to changing the voltage level of the first power rail. Other embodiments are described and claimed.

Compensation control for variable power rails

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Portland, OR, United States of America

Jeremy J Shrall