Arm Limited

Jeremy Davies

Richard Roy Grisenthwaite

Jorn Nystad

David Hennah Mansell

Oskar Lars Flordal

Ola Hugosson

Martinus Cornelis Wezelenburg

Harry Samuel Thomas Fearnhamm

To encode and compress a data array, the data arrayis first divided into a plurality of blocks. A quadtree representation is then generated for each blockby initializing each leaf node of the quadtree to the value of the data element of the blockof the data arraythat the leaf node corresponds to, and initializing each non-leaf node to the minimum value of its child nodes, and then subtracting from each node except the root node the value of its parent node. A set of data indicating the differences between respective parent and child node values in the quadtree representing the block of the data array is then generated and stored, together with a set of data representing a quadtree indicating the number of bits that have been used to signal the respective difference values.

Methods of and apparatus for encoding and decoding data in data processing systems

Methods of and apparatus for using tree representations for representing arrays of data elements for encoding and decoding data in data processing systems

Address translation circuitry for translating virtual addresses to physical addresses for a data processor in response to access requests from said data processor targeting virtual addresses is disclosed. The address translation circuitry comprises: a data store comprising a plurality of entries for storing a plurality of mappings of ranges of virtual addresses to ranges of physical addresses for said data processor and additional data associated with each of said plurality of mappings within a table; updating circuitry for updating said table in response to an access request for a virtual address that is not mapped by said table, said updating circuitry being responsive to receipt of a mapping for said virtual address to: select a plurality of entries in said table suitable for storing said received mapping; and determine one of said plurality of selected entries to be overwritten by said received mapping in dependence upon at least a portion of said additional data stored in said one of said plurality of selected entries.

Translation of virtual to physical addresses

A data compressor for compressing a data signal and a corresponding data decompressor are disclosed. The data compressor comprises: compression circuitry for compressing said data signal using a plurality of variable length compression codes; a digital code select signal generator for generating a digital code select signal from an indicator signal indicative of a preferred compression distribution, a frequency of said digital code select signal being higher than a frequency of said indicator signal and an average value of said digital code select signal corresponding to an average value of said indicator signal; said compression circuitry being responsive to said digital code select signal to select between one of said plurality of compression codes in dependence upon a current value of said digital code select signal and to compress said data signal using said selected compression code.

Dynamic selection of suitable codes for variable length coding and decoding

The present invention provides a data processing apparatus and method of controlling access to a shared resource. The data processing apparatus has a plurality of processors operable to perform respective data processing operations requiring access to the shared resource, and a path is provided interconnecting the plurality of processors. An access control mechanism is operable to control access to the shared resource by the plurality of processors, each processor being operable to enter a power saving mode if access to the shared resource is required but the access control mechanism is preventing access to the shared resource by that processor. Further, each processor is operable, when that processor has access to the shared resource, to issue a notification on the path when access to the shared resource is no longer required by that processor. A processor in the power saving mode is arranged, upon receipt of that notification, to exit the power saving mode and to seek access to the shared resource. This approach has been found to result in significant power savings.

Method and apparatus for placing at least one processor into a power saving mode when another processor has access to a shared resource and exiting the power saving mode upon notification that the shared resource is no longer required by the other processor

Growing community of inventors

Cambridge, United Kingdom

Jeremy Davies