Micron Technology Incorporated

Jeremy Chritz

Tamara Schmitz

Fa-Long Luo

Jaime Cummins

David Hulton

John Schroeter

John L Watson

Gregory Edvenson

Jonathan D Harms

Graham G Schwinn

Kevin T Majerus

Robert Trout

Aaron Preston Boehm

Robert F Gazdzinski

Max Vohra

Jamie Cummins

Apparatuses and methods for managing a coherent memory are described. These may include one or more algorithmic logic units (ALUs) and an input/output (IO) interface. The I/O interface may receive one or more commands and retrieve data from or write data to a memory device. Each command may contain a memory address portion associated with a memory device. The apparatus may also include a memory mapping unit and a device controller. The memory mapping unit may map the memory address to a memory portion of the memory device, and the device controller may communicate with the memory device to retrieve data from or write data to the memory device. The apparatus may be implemented as a processing element in a configurable logic block network, which may additionally include a control logic unit that receives programming instructions from an application and generate the one or more commands based on the instructions.

Configurable logic block networks and managing coherent memory in the same

Methods and apparatus for biometric data maintenance, access and distribution across two or more experiential and/or network domains. In one embodiment, a 5G NR-based network architecture is provided which allows ultra-low latency and effectively user-imperceptible biometric data use for e.g., authentication and maintenance of user state across multiple domains via multiple constituent user devices (e.g., UEs). The network architecture includes both (i) a distributed biometric database (BDB) model wherein relevant biometric data for individuals/UEs is intelligently cached in various portions of the distributed database, and (ii) centralized and local BAEs (biometric analytics entities) which manage the aforementioned intelligent caching, as well as network configuration using one or both of 5G NR network 'slicing' and CU/DU split options to optimize end-user biometric-related applications such as those providing identification/authentication, AR functions, VR functions or yet others.

Methods and apparatus for persistent biometric profiling

Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self-interference noise calculator. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into sets of intermediate results. Each set of intermediate results may be summed in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is received by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same frequency band as the wireless receiver is receiving.

Wireless devices and systems including examples of full duplex transmission

Systems, methods, and apparatuses related to cooperative learning neural networks are described. Cooperative learning neural networks may include neural networks which utilize sensor data received wirelessly from at least one other wireless communication device to train the neural network. For example, cooperative learning neural networks described herein may be used to develop weights which are associated with objects or conditions at one device and which may be transmitted to a second device, where they may be used to train the second device to react to such objects or conditions. The disclosed features may be used in various contexts, including machine-type communication, machine-to-machine communication, device-to-device communication, and the like. The disclosed techniques may be employed in a wireless (e.g., cellular) communication system, which may operate according to various standardized protocols.

Cooperative learning neural networks and systems

Examples described herein include apparatuses and methods for full duplex device-to-device cooperative communication. Example systems described herein may include self-interference noise calculators. The output of a self-interference noise calculator may be used to compensate for the interference experienced due to signals transmitted by another antenna of the same wireless device or system. In implementing such a self-interference noise calculator, a selected wireless relaying device or wireless destination device may operate in a full-duplex mode, such that relayed messages may be transmitted as well as information from other sources or destinations during a common time period (e.g., symbol, slot, subframe, etc.).

Full duplex device-to-device cooperative communication

Examples described herein include systems and methods which include wireless devices and systems with examples of configuration modes for baseband units (BBU) and remote radio heads (RRH). For example, a computing system including a BBU and a RRH may receive a configuration mode selection including information indicative of a configuration mode for respective processing units of the BBU and the RRH. The computing system may allocate the respective processing units to perform wireless processing stages associated with a wireless protocol. The BBU and/or the RRH may generate an output data stream based on the mixing of coefficient data with input data at the BBU and/or the RRH. Examples of systems and methods described herein may facilitate the processing of data for 5G (e.g., New Radio (NR)) wireless communications in a power-efficient and time-efficient manner.

Wireless devices and systems including examples of configuration modes for baseband units and remote radio heads

Methods, systems, and devices for verification of a volatile memory, such as a dynamic random-access memory (DRAM), using a unique identifier (ID) are described. A memory device may store a unique ID for a DRAM component of the memory device in non-volatile memory (e.g., in the DRAM, external to the DRAM). A host device coupled with the memory device may store, to non-volatile memory at the host device, information for verifying the identity of the DRAM component, for example, based on the unique ID. The memory device and host device may perform a procedure for verification of the identity of the DRAM component using the unique ID of the DRAM and the verification information stored at the host device. If the host device detects that the DRAM has been replaced or modified based on the verification procedure, the host device may disable one or more features of the memory device.

Verification of a volatile memory using a unique identifier

An apparatus, and a method therefore, are described, the apparatus according to one embodiment including a security manager and a plurality of clusters of processing elements. Each cluster of the plurality of clusters includes a respective plurality of processing elements. A controller of the apparatus, which may include a security manager, may be configured to control the plurality of clusters to receive a first data stream and a second data stream, control a first plurality of processing elements in a first cluster to process the first data stream using a first security protocol, and control a second plurality of processing elements in a second cluster to process the second data stream using a second security protocol.

Security managers and methods for implementing security protocols in a reconfigurable fabric

Examples of systems and methods described herein provide for accessing memory devices and, concurrently, generating access codes using an authenticated stream cipher at a memory controller. For example, a memory controller may use a memory access request to, concurrently, perform translation logic and/or error correction on data associated with the memory access request; while also utilizing the memory address as an initialization vector for an authenticated stream cipher to generate an access code. The error correction may be performed subsequent to address translation for a write operation (or prior to address translation for a read operation) to improve processing speed of memory access requests at a memory controller; while the memory controller also generates the encrypted access code.

Memory systems and devices including examples of accessing memory and generating access codes using an authenticated stream cipher

Examples described herein include systems and methods which include wireless devices and systems with examples of cross correlation including symbols indicative of radio frequency (RF) energy. An electronic device including a statistic calculator may be configured to calculate a statistic including the cross-correlation of the symbols. The electronic device may include a comparator configured to provide a signal indicative of a presence or absence of a wireless communication signal in the particular portion of the wireless spectrum based on a comparison of the statistic with a threshold. A decoder/precoder may be configured to receive the signal indicative of the presence or absence of the wireless communication signal and to decode the symbols responsive to a signal indicative of the presence of the wireless communication signal. Examples of systems and methods described herein may facilitate the processing of data for wireless communications in a power-efficient and time-efficient manner.

Wireless devices and systems including examples of cross correlating wireless transmissions

Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The processing mode selection may include a single processing mode, a multi-processing mode, or a full processing mode. The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.

Wireless devices and systems including examples of mixing coefficient data specific to a processing mode selection

Methods, apparatuses, and systems for tensor memory access are described. Multiple data located in different physical addresses of memory may be concurrently read or written by, for example, employing various processing patterns of tensor or matrix related computations. A memory controller, which may comprise a data address generator, may be configured to generate a sequence of memory addresses for a memory access operation based on a starting address and a dimension of a tensor or matrix. At least one dimension of a tensor or matrix may correspond to a row, a column, a diagonal, a determinant, or an Nth dimension of the tensor or matrix. The memory controller may also comprise a buffer configured to read and write the data generated from or according to a sequence of memory of addresses.

Memory devices and methods which may facilitate tensor memory access

Methods, systems, and devices for signal processing and wireless communication are described. For example, a device may include a plurality of antennas operable to transmit and receive communication packets via a plurality of communication protocols and an integrated circuit chip coupled to the plurality of antennas. The integrated circuit chip may comprise a first and a second plurality of processing elements. The first plurality of processing elements may be operable to receive communication packets via a first one of a plurality of communication protocols and process an optimal route. The second plurality of processing elements may be communicatively coupled to the first plurality of processing elements and operable to determine the optimal route to transmit the communication packets from a source device to a destination device based, at least in part, on transmission characteristics associated with at least one of the source or destination devices.

System for optimizing routing of communication between devices and resource reallocation in a network

Examples described herein include methods, devices, and systems which may implement different processing stages for wireless communication in processing units. Such data processing may include a source data processing stage, a baseband processing stage, a digital front-end processing stage, and a radio frequency (RF) processing stage. Data may be received from a sensor of device and then processed in the stages to generate output data for transmission. Processing the data in the various stages may occur during an active time period of a discontinuous operating mode. During the active time period, a reconfigurable hardware platform may allocate all or a portion of the processing units to implement the processing stages. Examples of systems and methods described herein may facilitate the processing of data for 5G (e.g., New Radio (NR)) wireless communications in a power-efficient and time-efficient manner.

Growing community of inventors

Seattle, WA, United States of America

Jeremy Chritz