Lg Display Co., Ltd.

JeongKi Kim

Seungho Baek

Joonyoung Park

Jooah Kim

JuSeong Park

Euitae Kim

Kwangjo Hwang

Jeongki Lee

Myungsoo Park

ChangHo Lee

Jooeh Kim

An autostereoscopic three-dimensional (3D) display in which the multi view structure is configured by using the lenticular lens. The autostereoscopic 3D display can include a display panel including a plurality of pixels; a plurality of lenticular lens disposed on a front surface of the display panel and having a slanted axis; a position detector measuring the distance of an observer from the display panel; and a view-map selector selecting one of view-maps in accordance with the distance of the observer from the display panel.

Autostereoscopic 3-dimensional display

The stereoscopic image display includes a control voltage generator and a control voltage compensator. The control voltage generator generates a discharge control voltage to be applied to a discharge control line at a slight-on level, which is higher than a gate low voltage and is lower than a gate high voltage, and periodically reduces the discharge control voltage to a level of the gate low voltage in the 3D mode. The control voltage compensator receives the discharge control voltage from the control voltage generator, amplifies a feedback discharge control voltage supplied from a first part of a display panel based on the received discharge control voltage, and applies the amplified feedback discharge control voltage, as a compensated discharge control voltage, to a second part opposite the first part of the display panel.

Driving method to improve stereoscopic image display visibility

A stereoscopic image display includes a liquid crystal display panel including a plurality of pixels, each of which is divided into a main pixel unit and an switchable black stripe, a data driving circuit, a gate driving circuit, and a 3D control voltage generation circuit, which supplies AC voltages, of which phases are sequentially shifted, to a plurality of 3D control lines in a 3D mode.

Stereoscopic image display

A stereoscopic image display and a driving method thereof are discussed. The stereoscopic image display includes a data driving circuit that supplies a data voltage to data lines of a display panel; a gate driving circuit that supplies a gate pulse to gate lines of the display panel; and a timing controller that controls operation timings of the data driving circuit and gate driving circuit. The gate driving circuit delays a rising timing of the gate pulse to a point in time after a rising edge time of the data voltage in a 3D mode for displaying a 3D image on the display panel, under a control of the timing controller.

Stereoscopic image display and driving method thereof

A a stereoscopic image display includes: a liquid crystal display panel including a 3D control line to which a 3D control voltage is applied, and a plurality of pixels, each of the pixels being divided into a main pixel portion and an active black stripe; and a 3D control voltage generation circuit that supplies a 3D control voltage to the 3D control line and discharges a voltage of the active black stripe down to a black gray voltage.

A stereoscopic image display includes a display panel which includes a plurality of pixels each including a main display unit and an auxiliary display unit, is divided into a first screen block and a second screen block, and includes a first discharge control line connected to auxiliary display units of the first screen block and a second discharge control line connected to auxiliary display units of the second screen block, a control voltage generator which generates a first discharge control voltage of a first AC waveform and a second discharge control voltage of a second AC waveform, of which a phase is later than a phase of the first AC waveform by a half frame period, and a control voltage delay unit which delays the first and second discharge control voltages.

An image display device includes a display panel which selectively displays a 2D image and a 3D image and includes a plurality of pixels, a patterned retarder for dividing light from the display panel into first polarized light and second polarized light, and a control voltage generation circuit which generates a 2D control voltage at an off-level and generates a 3D control voltage alternately having a slight-on level and the off-level every predetermined period of time. The slight-on level is higher than the off-level and is lower than a full-on level. Each pixel includes a main display unit including a first pixel electrode and a first common electrode and a subsidiary display unit including a second pixel electrode, a second common electrode, and a discharge control switch.

Growing community of inventors

Paju-si, South Korea

JeongKi Kim