Lg Electronics Inc.

Samsung Electronics Co., Ltd.

Industry-university Cooperation Foundation Hanyang University

Jeonghyu Yang

Kyeongryeol Park

Jongchan Kim

Seoksoo Lee

Seungjong Choi

Saem Park

Jongyeul Suh

Hansoo Kim

Joonhui Lee

Jihoon Lee

Byungtae Choi

Jinpil Kim

Wonwoo Lee

Yeonoh Nam

Myongyoung Lee

Yongtaek Gong

Seokpan Kang

Sangchurl Nam

JongWoo Ha

Kyungmee Lee

Jeehyun Choe

Hyuntae Kim

Jaeduk Han

Jungeun Lim

Seokjoo Lee

Junseong Kim

Yunjun Choi

Sanghun Lee

Hotaek Hong

Youngdon Choi

Changhyun Kim

Hyunyoon Cho

Jong-Yeul Suh

Jingyeong Kim

Eunseok Shin

Jinseok Im

Hyeongmin Seo

Hyunchul Noh

Jee Hyun Choe

Sunguk Lim

A parallel-to-serial converter includes first to fourth input nodes configured to receive first to fourth data input signals, respectively, and an output node configured to output a data output signal. First to fourth logic circuits are provided, which are configured to electrically couple respective ones of the first to fourth input nodes one-at-a-time to the output node, in synchronization with first to fourth clock signals. The first logic circuit includes a first input circuit, a second input circuit, and an output circuit electrically coupled to the first and second input circuits. The output circuit includes a first pull-up transistor and a first pull-down transistor having drain terminals coupled to the output node, a second pull-up transistor connected between a source terminal of the first pull-up transistor and a first power supply node, and a second pull-down transistor connected between a source terminal of the first pull-down transistor and a second power supply node.

Semiconductor devices having parallel-to-serial converters therein

A signal processing device and an image display apparatus including the same are disclosed. The signal processing device includes a scaler configured to scale input images of various resolutions to a first resolution, a resolution enhancement processor configured to perform learning on the input images and to output a residual image of the first resolution, and an image output interface configured to output an output image of the first resolution based on a scaling image from the scaler and the residual image from the resolution enhancement processor, and the image output interface changes a weight and an application strength of the residual image according to the area of the input image.

Signal processing device and image display device comprising same

Disclosed are a signal processing device and an image display apparatus including the same. The signal processing device of an embodiment of the present disclosure includes: a quality calculator configured to calculate a source quality of an image signal received from an external settop box or a network; an image quality setter configured to set an image quality of the image signal based on the calculated source quality; and an image quality processor configured to perform image quality processing on the image signal based on the set image quality, wherein in response to the source quality of the received image signal being changed at a first time point, the image quality setter changes an image quality setting sequentially from a first setting to a second setting; and based on the image quality setting, the image quality processor performs image quality processing. Accordingly, flicker may be reduced when an image quality is changed due to a change in the source quality of the received image signal.

Signal processing device and video display device comprising same

Provided are a signal processing device and an image display apparatus including the same. The signal processing device and the image display apparatus including the same include: a signal processormay include an OSC processor configured to upscale an OSC having a first resolution to a second resolution greater than the first resolution; and a synthesizer configured to synthesize at least a part of an image having the second resolution and the upscaled OSD having the second resolution, and the OSD processor outputs the OSD having the second resolution, in which luminance and transparency are adjusted.

Signal processing device and image display apparatus including the same capable of increasing clarity of OSD when mixing with image

The present disclosure relates to a signal processing device and an image display apparatus including the same. A signal processing device according to an embodiment of the present disclosure includes: an input interface to receive an image signal; a first image processor to generate first image frame data based on the image signal; a second image processor to generate second image frame data scaled down from the first image frame data based on the image signal; and an output interface to receive the first image frame data from the first image processor and the second image frame data from the second image processor and to output the first image frame data and the second image frame data, wherein the first image frame data output from the output interface is more delayed than the second image frame data output from the output interface. Accordingly, a timing controller may accurately and rapidly perform signal processing for a panel.

Signal processing device and image display apparatus including same

A signal processing device and an image display apparatus including the same are disclosed. A signal processing device and an image display apparatus including the same according to an embodiment of the present disclosure includes: an afterimage analyzer to calculate image accumulation information based on an input image, an afterimage learning processor to perform learning based on the image accumulation information and adjust an afterimage reducing strength based on the learning, and an afterimage reducing processor to perform an afterimage reducing process based on the afterimage reducing strength from the afterimage learning processor. Accordingly, an afterimage of the image display apparatus including the organic light emitting diode panel may be reduced.

Signal processing device and image display apparatus including the same

The present disclosure relates to an image display apparatus. The image display apparatus according to an embodiment of the present disclosure comprises: a signal processor configured to perform image processing of an input image, and audio processing of audio corresponding to the input image; a virtual sensor device configured to receive image and audio information processed by the signal processor; a sensor device configured to collect externally captured image information or sound information; and an artificial intelligence (AI) processor configured to perform the image processing of the input image or the audio processing based on AI using the image and audio information from the virtual sensor device, and the image or sound information from the sensor device. Accordingly, the image display apparatus may operate based on AI.

Image display apparatus with AI-based image processing

A high-speed 4:1 multiplexer according to an embodiment comprises an input circuit unit including a first circuit that receives a first data as an input signal, and outputs a first output data as an output signal, a second circuit that receives a second data as an input signal, and outputs a second output data as an output signal, a third circuit that receives a third data as an input signal, and outputs a third output data as an output signal, and a fourth circuit that receives a fourth data as an input signal, and outputs a fourth output data as an output signal, a first stage for dividing the output data of the input circuit unit by two and receiving as an input signal, and outputting a first intermediate data and a second intermediate data as an output signal and a second stage of receiving the first intermediate data and the second intermediate data as an input signal and outputting a final data as an output signal.

High speed 4:1 multiplexer

The present disclosure relates to a video wall. The video wall according to an embodiment of the present disclosure comprises: a plurality of displays; an image divider configured to divide an input image into a plurality of images; and at least one controller, wherein in response to a video being repeatedly played back, the at least one controller is configured to calculate an accumulated luminance value for each block on the plurality of displays during a first period when the video is repeatedly played back and calculate a luminance compensation value for each block based on the calculated accumulated luminance, and the plurality of displays display the video based on the luminance compensation value during a second period following the first period. Accordingly, an afterimage occurring due to the repeatedly played video may be reduced.

Video wall

The present disclosure relates to a signal processing device and an image display apparatus including the same. The signal processing device includes: an input interface to receive an image signal; a first image processor to generate first image frame data based on the image signal; a second image processor including a scaler to generate second image frame data scaled down in comparison with the first image frame data; and an output interface to output the first image frame data and the second image frame data, wherein the scaler generates at least one super pixel or super block and outputs the scaled down second image frame data including the super pixel or the super block. Accordingly, it is possible to generate the scaled down second image frame data with reduced error as compared to the first image frame data.

Disclosed is a signal processing device and an image display apparatus including the same. The signal processing device and the image display apparatus comprise: a first reduction unit to receive a image signal and reduce noise of the received image signal, and a second reduction unit to perform grayscale amplification based on the image signal from the first reduction unit, wherein the second reduction unit is configured to perform the grayscale amplification so that upper-limit level of grayscale of the image signal from the first reduction unit is greater than upper-limit level of grayscale of an OSD signal. Accordingly, OSD area may be uniformly displayed regardless of ambient luminance.

Disclosed is a signal processing device and an image display apparatus including the same. In the signal processing device and the image display apparatus according to the present disclosure, a High Dynamic Range (HDR) processor receives an image signal and adjust a luminance of the image signal, and a reduction unit configured to amplify the adjusted luminance of the image signal and increase a resolution of the grayscale of the image signal to generate an enhanced image signal, wherein the enhanced image signal provides an increased luminance and grayscale resolution of the image signal while maintaining high dynamic range within the displayed HDR image. Accordingly, expression of high grayscale of a received image may improve.

Disclosed are a signal processing device and an image display apparatus including the same. The signal processing device of an embodiment of the present disclosure includes: a quality calculator configured to calculate an source quality of an image signal received from an external settop box or a network; an image quality setter configured to set an image quality of the image signal based on the calculated source quality; and an image quality processor configured to perform image quality processing on the image signal based on the set image quality, wherein in response to the source quality of the received image signal being changed at a first time point, the image quality setter changes an image quality setting sequentially from a first setting to a second setting; and based on the image quality setting, the image quality processor performs image quality processing. Accordingly, flicker may be reduced when an image quality is changed due to a change in the source quality of the received image signal.

Growing community of inventors

Seoul, South Korea

Jeonghyu Yang