Gct Semiconductor, Inc.

Samsung Electronics Co., Ltd.

Cheil Industries Inc.

Jeong-Woo Lee

Kyeongho Lee

Joonbae Park

Yido Koo

Jong-Hwa Lee

Hwan-Sung Cheon

Ji-Young Jeong

Hyun-Yong Cho

Yong-Sik Yoo

Min-Kook Chung

Kang Yoon Lee

Seung-wook Lee

Jae-Hyun Kim

Mi-Young Chae

Young-ho Kim

Soo-Young Kim

Dal-Ho Huh

Su-Min Park

Eunseok Song

Hyungki Huh

Tae-Woo Lee

Eui-Su Kang

Doo-Young Jung

Youngho Ahn

Hyun-Jin Choi

Soo-Hyun Min

Myoung-Hwan Cha

Dong-Ryul Ryu

Suwon Kang

Chan-ik Park

Kyoung-Mi Lee

Sung-Joo Yoo

Byoung-Kook Lee

Tae-Gyu Lee

Wei Liu

Joonban Park

Young-Deuk Jeon

Seung-Wook Lee

This disclosure relates to a positive photosensitive resin composition including (A) a resin precursor including a polybenzoxazole precursor, a polyamic acid, or a combination thereof, (B) a dissolution-controlling agent having a boiling point ranging from about 210&#xb0; C. to about 400&#xb0; C. and a polarity ranging from about 1 D to about 4 D, (C) an acid generator, (D) a silane-based compound, and (E) a solvent. The polybenzoxazole precursor includes a repeating unit represented by Chemical Formula 1, or both of repeating units represented by Chemical Formulae 1 and 2 and has a thermally polymerizable functional group at at least one end. The polyamic acid includes a repeating unit of Chemical Formulae 50 and 51.

Positive type photosensitive resin composition

A conductive polymer, a conductive polymer composition, a conductive polymer organic film, and an organic photoelectric device including the same, the conductive polymer including repeating units represented by the following Chemical Formula 1, repeating units represented by the following Chemical Formula 2, and repeating units represented by the following Chemical Formula 3: 

Conductive polymer, conductive polymer composition, conductive polymer organic film, and organic photoelectric device including the same

A conductive polymer, a conductive polymer composition, a conductive polymer layer, and an organic photoelectric device including the conductive polymer layer, the conductive polymer being doped with a polyacid copolymer, the polyacid copolymer being represented by the following Chemical Formula 1: 

Conductive polymer, conductive polymer composition, conductive polymer layer, and organic photoelectric device including the conductive polymer layer

Disclosed are a novel phenol compound comprising a compound represented by Chemical Formula 1, a compound represented by Chemical Formula 2, or a combination thereof, and a positive photosensitive resin composition including the same.

Phenol compounds and positive photosensitive resin composition including the same

An ortho-nitrobenzyl ester compound including a compound represented by Chemical Formula 1, and a positive photosensitive resin composition including the same are provided.

Ortho-nitrobenzyl ester compound and positive type photosensitive resin composition including the same

A conductive polymer compound includes: a conductive polymer; a first repeating unit represented by the following Chemical Formula 1; a second repeating unit represented by the following Chemical Formula 2; and a third repeating unit represented by the following Chemical Formula 3 and/or Chemical Formula 4, 

Conductive polymer compound and organic photoelectric device including same

Embodiments of the inventive concept provide a nonvolatile memory device. The nonvolatile memory device includes a memory cell array, a read/write circuit, and a backup circuit. The memory cell array includes a first memory block including a first word line having first memory cells and a second word line having second memory cells. Each of the first memory cells and second memory cells configured to store first-bit data and second-bit data. The read/write circuit is configured to program data into the first and second memory cells and read data stored in the first and second memory cells. The backup circuit is configured to, after first-bit data are programmed into the first word line, but before second-bit data are programmed into the first word line, store first-bit data stored in the second memory cells of the second word line.

Nonvolatile memory device, methods of programming the nonvolatile memory device and memory system including the nonvolatile memory device

Disclosed is a positive photosensitive resin composition that includes (A) a polybenzoxazole precursor including a repeating unit represented by the following Chemical Formula 1; (B) a photosensitive diazoquinone compound; (C) a silane compound; (D) a phenol compound; and (E) a solvent. In the above Chemical Formula 1, each substituent is the same as defined in the specification.

Positive photosensitive resin composition

A method of controlling a non-volatile memory device includes comparing the number of banks that are in operating states with a threshold value. If the number of the banks is smaller than the threshold value, data stored in a standby bank is read. If there is no bank having data to be read, a standby bank is programmed. If the number of the banks is equal to or greater than the threshold value or if the reading or the programming is performed, it is determined whether there is a reading or programming command to be performed. If there is the reading or programming command to be performed, the process is repeated from the comparing step. The programming may include programming of a most significant bit (MSB) page or a least significant bit (LSB) page.

Method of controlling non-volatile memory device

Disclosed is a positive photosensitive resin composition that includes: (A) a polybenzoxazole precursor including a repeating unit represented by the Chemical Formula 1, a repeating unit represented by the Chemical Formula 2, or a combination thereof, and a thermally polymerizable functional group at least one terminal end of the polybenzoxazole precursor; (B) a photosensitive diazoquinone compound; (C) a silane compound; (D) a phenol compound including a cross-linking functional group; and (E) a solvent.

Provided is a semiconductor memory apparatus that may use an efficient protocol between an NAND flash memory device and a controller to reduce bus traffic. The flash memory device may include a memory cell array and an error correction encoder. The memory cell array may include a plurality of pages. The error correction encoder may generate first parity data based on normal data to be written to the memory cell array, compare the first parity data and second parity data encoded with the normal data stored in the memory cell array, and check an error. The error position detector may detect an error position in response to the error signal transmitted from the error correction encoder. Thus, since the semiconductor memory apparatus may transmit and receives parity data or a syndrome between an NAND flash memory device and the controller by detecting and correcting an error in the same memory chip, bus traffic may be reduced.

Semiconductor memory apparatus for reducing bus traffic between NAND flash memory device and controller

A system and method for searching a mapping table of a flash memory is provided. The system includes at least one random access memory for storing the mapping table retrieved from the flash memory and at least one search engine for searching for data from the mapping table stored in the at least one random access memory using dedicated hardware. Thus, the search efficiency for the mapping table and system performance may be increased.

System and method for searching mapping table of flash memory

An integrated circuit package includes an inductance loop formed from a connection of bonding wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from a first wire which connects a bonding pad on the integrated circuit chip to an I/O pin of the package and a second wire which connects the same bonding pad to the same pin. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization.

Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure

An integrated circuit package includes an inductance loop formed from a connection of lead wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from first and second wires which connect a first bonding pad on the integrated circuit chip to a first I/O pin of the package and a third and fourth wires which connect a second bonding pad on the chip to a second I/O pin of the package. To complete the inductor loop, the first and second I/O pins are connected by a third conductor between the pins. The third conductor may include one or more bonding wires and the I/O pins are preferably ones which are adjacent one another. However, the loop may be formed from non-adjacent connections of I/O pins based, for example, on loop-length requirements, space considerations, and/or other design or functional factors. In another embodiment, connection between the first and second I/O pins is established by making the I/O pins have a unitary construction. In another embodiment, connection between the first and second I/O pins is established by a metallization layer located either on the surface of the package substrate or within this substrate. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization. Also, the integrated circuit may be implemented in any one of a variety of systems, at least one parameter of which is controlled by the length of the inductor loop of the package.

Integrated circuit package having an inductance loop formed from a multi-loop configuration

We describe and claim an improved non-volatile memory storage device including an interface select switch and associated method. The device comprises a non-volatile memory, and an interface unit including a plurality of storage interfaces, the interface unit to select a storage interface from the plurality of storage interfaces responsive to a selection signal, where the non-volatile memory to exchange data with a host external to the device via the selected storage interface. In an embodiment, the selected storage interface is an ATA storage interface to convert the exchanged data in accordance with an ATA protocol when selected responsive to the selection signal. In another embodiment, the selected storage interface is a SATA storage interface to convert the exchanged data in accordance with a SATA protocol when selected responsive to the selection signal.

Growing community of inventors

Seoul, South Korea

Jeong-Woo Lee