Mk Electron Co., Ltd.

Korea Advanced Institute of Science and Technology

Korea Electronics Technology Institute

Korea Institute of Industrial Technology

Hoseo University Academic Cooperation Foundation

Jeong Tak Moon

Young Woo Lee

Hui Jung Kim

Sung Jae Hong

Jae Hun Song

Jae Yeol Son

Jae Hong Lee

Seul Gee Lee

Kyu Hwan Oh

Chang Woo Lee

Yong Jin Park

Jae Won Chang

Jung Hwan Bang

Jong Soo Cho

Yong Ho Ko

Eun Kyu Her

Ho Gun Cha

Min Su Park

Hyuck Mo Lee

Ja Hyun Koo

Im Bok Lee

Keun Soo Kim

Won Sik Hong

Eung Jae Kim

Seul Gi Lee

Hui Joong Kim

Jae Yool Son

Santosh Kumar

A lead-free solder alloy includes bismuth (Bi), content of which is equal to or greater than 56 wt % and equal to or less than 57.5 wt %, indium (In), content of which is equal to or greater than 0.05 wt % and equal to or less than 1.0 wt %, and the balance of tin (Sn) and another unavoidable impurity. The lead-free solder alloy of the disclosure may enable bonding with improved ductility and thermal shock reliability while not having a large melting point change compared to an Sn-58Bi alloy.

Lead-free solder alloy and method of manufacturing electronic device using the same

Provided is a semiconductor package including a first bump pad on a first substrate, a second bump pad on a second substrate, a core material for reverse reflow between the first bump pad and the second bump pad, and a solder member forming a solder layer on the core material for reverse reflow. The solder member is in contact with the first bump pad and the second bump pad. Each of a first diameter of the first bump pad and a second diameter of the second bump pad is at least about 1.1 times greater than a third diameter of the core material for reverse reflow. The core material for reverse reflow includes a core, a first metal layer directly coated on the core, and a second metal layer directly coated on the first metal layer.

Semiconductor package using core material for reverse reflow

A solder ball and a semiconductor device using the same are provided. In a Sn-based solder ball in which a first plating layer and a second plating layer are sequentially formed on a core ball, the second plating layer includes a Sn&#x2014;Ag&#x2014;Cu alloy, and AgSn intermetallic compound (IMC) nanoparticles or Ag&#x2014;Sn compound nanoparticles exist in the second plating layer. The solder balls have high sphericity and stand-off characteristics and connection reliability so that a semiconductor device having a high degree of integration may be implemented.

Solder balls and semiconductor device employing the same

Provided are a lead-free solder, a solder paste, and a semiconductor device, and more particularly, a lead-free solder that includes Cu in a range from about 0.1 wt % to about 0.8 wt %, Pd in a range from about 0.001 wt % to about 0.1 wt %, Al in a range from about 0.001 wt % to about 0.1 wt %, Si in a range from about 0.001 wt % to about 0.1 wt %, and Sn and inevitable impurities as remainder, a solder paste and a semiconductor device including the lead-free solder. The lead-free solder and the solder paste are environment-friendly and have a high high-temperature stability and high reliability.

Lead free solder bumps

A tin (Sn)-based solder ball and a semiconductor package including the same are provided. The tin-based solder ball includes about 0.2 to 4 wt. % silver (Ag), about 0.1 to 1 wt. % copper (Cu), about 0.001 to 0.3 wt. % aluminum (Al), about 0.001% to 0.1 wt. % germanium (Ge), and balance of tin and unavoidable impurities. The tin-based solder ball has a high oxidation resistance.

Tin-based solder ball and semiconductor package including the same

A gold-silver based wire for a semiconductor package has high humidity reliability as well as high dry reliability. The wire includes a first additive ingredient that contains 5&#x2dc;15 wt % of at least one kind of elements from among first group elements composed of palladium (Pd) and platinum (Pt) added to a gold (Au)-silver (Ag) based alloy that contains 10&#x2dc;40 wt % of Ag added to Au.

Au-Ag based alloy wire for semiconductor package

Growing community of inventors

Gyeonggi-do, South Korea

Jeong Tak Moon