Hynix Semiconductor Inc.

Skhynix Inc.

Samsung Display Co., Ltd.

Sk Telecom Company, Ltd.

Ewha University-Industry Collaboration Foundation

Emw Co., Ltd.

Top Central R&d Center

Corepharm Co., Ltd.

Corepharmbio Co., Ltd.

Jeong Tae Kim

Dong Ha Jung

Baek Mann Kim

Young Jin Lee

Seung Jin Yeom

Soo Hyun Kim

Nam Yeal Lee

Sun Woo Hwang

Jae Hong Kim

Joon Seok Oh

Dae Ho Rho

Yoon Jik Lee

Hyun Kyu Kim

Hyun Woo Koo

Sun Ho Kim

Ki Hyun Kim

Seong Jae Lee

Chang Soo Park

Byung Hoon Ryou

Won Mo Sung

Se Hyun Oh

Tae Hyeong Ha

Bong Yong Song

Youl No Lee

Gab Seok Jang

Myo Guen Yang

Young Sam Goo

Young Lae Kim

Hyun Tae Lim

Sang Wook Kim

Disclosed is an apparatus for tracking an object based on radar image reconstruction, the apparatus including a two-dimensional image producing unit configured to produce a two-dimensional image by collecting multiple one-dimensional radar signals from which clutter is removed, an object detecting unit configured to determine the presence or absence of an object from the two-dimensional image and estimate a two-dimensional position of the present object, and an object tracking unit configured to track a movement path of the object based on the two-dimensional position estimated by the object detecting unit.

Apparatus and method for tracking object based on radar image reconstruction

A pharmaceutical composition which is Rapidly Dissolved in a mouth, comprising

Microgranular formulation including coagulation unit comprising discontinuous phase and continuous phase

A method of manufacturing a flexible display device, the method including forming a sacrificial layer on a carrier substrate such that the sacrificial layer includes a hydrogen trap material and amorphous silicon; forming a support layer and a thin film transistor on the sacrificial layer; and separating the support layer from the carrier substrate by irradiating a laser to the sacrificial layer.

Manufacturing method of flexible display device

Semiconductor memory apparatus and a method of fabricating the same are provided. The semiconductor memory apparatus includes a semiconductor substrate in which a cell area and a peripheral area are defined, a plurality of pillars formed in the a cell area of the semiconductor substrate to a first depth, a stepped part formed in the peripheral area to a height corresponding to the first depth, a recessed part formed in the stepped part to a second depth, and a core switching device formed in the recessed part.

Fabrication method of vertical type semiconductor memory apparatus

Vertical type semiconductor memory apparatus and fabrication method thereof

A metal wiring of a semiconductor device includes a semiconductor substrate; an insulating layer provided with a damascene pattern formed over the semiconductor substrate; a diffusion barrier layer which contains a RuOlayer formed on a surface of the damascene pattern and an Al deposit-inhibiting layer formed on a portion of the RuOlayer in both-side upper portion of the damascene pattern; and a wiring metal layer including Al formed on the diffusion barrier layer by MOCVD method in order to fill the damascene pattern.

Metal wire for a semiconductor device formed with a metal layer without voids therein and a method for forming the same

A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.

Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same

An electrical conductor having a multilayer diffusion barrier of use in a resultant semiconductor device is presented. The electrical conductor line includes an insulation layer, a diffusion barrier, and a metal line. The insulation layer is formed on a semiconductor substrate and having a metal line forming region. The diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and has a multi-layered structure made of TaN layer, an MoOlayer and an Mo layer. The metal line is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.

Electrical conductor line having a multilayer diffusion barrier for use in a semiconductor device and method for forming the same

The present invention relates to a transmission line in which a physical value of an inductive element can be changed in various ways while minimizing a size. The transmission line of the present invention includes a transmission unit, a ground unit and inductive elements. The inductive element connects the transmission unit and the ground unit, and has a predetermined pattern. The inductive element is provided between two surfaces of a substrate. According to the present invention, a physical value of the inductive element, in particular, an inductance value can be changed in various ways while not increasing an overall size. Accordingly, a transmission line can be designed freely according to its application.

Transmission line with left-hand characteristics including a spiral inductive element

A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNlayer, a W&#x2014;N&#x2014;B ternary layer, and a Ti&#x2014;N&#x2014;B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.

Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same

A multi-layer metal wiring of a semiconductor device and a method for forming the same are disclosed. The multi-layer metal wiring of the semiconductor device includes a lower Cu wiring, and an upper Al wiring formed to be contacted with the lower Cu wiring, and a diffusion barrier layer interposed between the lower Cu wiring and the upper Al wiring. The diffusion barrier layer is formed of a W-based layer.

Multi-layer metal wiring of semiconductor device preventing mutual metal diffusion between metal wirings and method for forming the same

A multi-layered metal line of a semiconductor device and a process of forming the same are described. The multi-layered metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is subsequently formed on the semiconductor substrate including the lower metal line and has an upper metal line forming region that exposes a portion of the lower metal line. A diffusion barrier formed on a surface of the upper metal line forming region of the insulation layer. The diffusion barrier includes a W&#x2014;B&#x2014;N ternary layer. An upper metal line is finally formed on the diffusion barrier to fill the upper metal line forming region of the insulation layer.

Multi-layered metal line having an improved diffusion barrier of a semiconductor device and method for forming the same

A metal line of a semiconductor device having a diffusion barrier including CrBand a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrBlayer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrBlayer.

Metal line of semiconductor device having a diffusion barrier including CRxBy and method for forming the same

Growing community of inventors

Seoul, South Korea

Jeong Tae Kim