Dongbu Hitek Co., Ltd.

Jeong-Su Park

An image sensor includes a trench formed in a semiconductor substrate, a first reflection part formed in the trench and having an inclined, curved surface, a second reflection part formed on the first reflection part such that a remaining space of the trench is filled with the second reflection part, and a vertical type photodiode formed on a region of the substrate between trenches. A method for forming the image sensor includes forming a trench in a semiconductor substrate, forming a first reflection part having an inclined, curved surface in the trench, forming a second reflection part on the first reflection part such that a remaining space of the trench is filled with the second reflection part, and forming a vertical type photodiode on a region of the substrate between trenches.

Image sensor and manufacturing method of image sensor

An image sensor including a first epitaxial layer formed over a semiconductor substrate; first photodiodes formed spaced apart in the first epitaxial layer; a first isolation region electrically isolating the first photodiodes from each other; a second epitaxial layer formed over the first epitaxial layer; second photodiodes formed spaced apart in the second epitaxial layer; and a second isolation region electrically isolating the second photodiodes from each other.

Image sensor and method of manufacturing the same

A method of manufacturing a complimentary metal oxide semiconductor (CMOS) image sensor. The method includes a step of performing a silicide process relative to a plug for transferring electrons generated from a photodiode. The silicide of the plug blocks light irradiated through the plug, so that the performance of the image sensor may be optimized.

Method of fabricating CMOS image sensor

Embodiments relate to an image sensor and a method for manufacturing an image sensor that may prevent a photoresist pattern from remaining on gates by forming a floating diffusion area faster than the gates. According to embodiments, since the gates may not be influenced by an ion implantation process, current characteristics and operation reliability may be enhanced. According to embodiments, the method may include forming dummy ion implantation mask patterns for forming a floating diffusion area over an epitaxial layer and forming an ion implantation mask pattern over the epitaxial layer and at least a portion of the dummy ion implantation mask patterns, so as to form the floating diffusion area by performing an ion implantation process.

Method of forming a vertical image sensor that includes patterning an oxide layer to form a mask for implanting a floating diffusion area

A method for manufacturing an image sensor that can include forming a pad electrode over a semiconductor substrate; forming a protective layer over the pad electrode; forming a via hole through the protective layer to expose a portion of the uppermost surface of the pad electrode; and then forming a gold layer over the exposed portion of the uppermost surface of the pad electrode.

Image sensor and method for manufacturing the same

A fabrication method of a CMOS image sensor provides forms micro lenses over a substrate by etching a plurality of holes in a wiring layer over a pixel area. An oxide layer is deposited to form a surface with a semi-circular cross section over the holes. The oxide layer may be etched away, leaving micro lenses formed in the wiring layer.

Method of fabricating a CMOS image sensor with micro lenses formed in a wiring layer

A CMOS image sensor that is capable of substantially completely intercepting unnecessary light incident from the outside and preventing the occurrence of a hot pixel phenomenon and a method of fabricating the same are disclosed. A CMOS image sensor includes an epitaxial layer having a plurality of photodiodes. The epitaxial layer may be formed over a main pixel region and a dummy pixel region, which may be defined on a semiconductor substrate. A device passivation layer may be formed by depositing and planarizing oxide over the epitaxial layer. A silicon oxide layer may be formed by depositing and planarizing silicon oxide over the device passivation layer. The silicon oxide layer may have a concavo-convex type oxide pattern over the main pixel region and a planar oxide pattern over the dummy pixel region. A plurality of dark matrix elements may be formed by sequentially stacking a dual layer and a metal layer over the silicon oxide layer. A planarization process may be performed until the concavo-convex type oxide pattern is exposed. Micro lenses may be formed such that the micro lenses are aligned with photodiodes which will be formed at the main pixel region and the dummy pixel region.

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Seoul, South Korea

Jeong-Su Park