Samsung Display Co., Ltd.

Lg Electronics Inc.

Jeong-Soo Lee

Moo Soon Ko

Deuk Myung Ji

Ji Seon Lee

Jin Sung An

Jihye Kong

Se Wan Son

Min Woo Woo

Seong Min Wang

Ju-Won Yoon

Jung Hwa Kim

Young Woo Park

Seong Jun Lee

Wan-Soon Im

Wang Woo Lee

Jina Lee

Sungwook Kim

Sewan Son

Chulho Kim

Youngwoo Park

Sugwoo Jung

Yongho Yang

Ji Ryun Park

Kidan Lee

Young-In Hwang

Jae Hyun Lee

Il-Jeong Lee

Yong Ho Yang

Seok Je Seong

Kyoungju Shin

Yoon-Jong Cho

Kyung Hyun Baek

Suyul Seo

Young-in Hwang

Min-Woo Woo

Ji Hye Kong

Jung-Hwa Kim

Yang-Gi Kim

Eun-Kyu Chang

Wan-soon Im

Kyeong-Su Yim

A display device includes a plurality of pixels where each pixel includes a first transistor connected between a first node and a second node, and including a gate electrode connected to a third node, a second transistor connected between a data line and the first node, and including a gate electrode, a third transistor connected between the second node and the third node, and including a gate electrode, a fourth transistor connected between a first initialization voltage line and the third node, and including a gate electrode, a fifth transistor connected between a first power line and the first node, and including a gate electrode, a sixth transistor connected between the second node and a fourth node, and including a gate electrode, a storage capacitor connected between the third node and the first power line, and a light emitting element connected between the fourth node and a second power line.

Display device

A display device includes a light-emitting element, a driving element to apply a driving current, a 1-1 switching element including a first electrode connected to a gate electrode of the driving element, a gate electrode, and a second electrode connected to a first intermediate node, a 1-2 switching element including a first electrode connected to the first intermediate node, a gate electrode, and a second electrode connected to a second electrode of the driving element, a 2-1 switching element including a first electrode connected to a second intermediate node, a gate electrode, and a second electrode connected to the gate electrode of the driving element, a 2-2 switching element including a first electrode, a gate electrode, and a second electrode connected to the second intermediate node, and a capacitor including a first electrode to receive a power voltage, and a second electrode connected to the first and second intermediate nodes.

Display device having capacitor including intermediate area

A pixel circuit is disclosed that includes a first hold capacitor or a second hold capacitor or both the first and second hold capacitors. The first hold capacitor is connected to a first gate electrode of a first transistor and an intermediate node of a first sub-transistor and a second sub-transistor. The second hold capacitor is connected to the first gate electrode of the first transistor and an intermediate node of a third sub-transistor and a fourth sub-transistor.

Pixel circuit including transistor, sub-transistors, and hold capacitor

A display device includes a plurality of pixels and an upper signal line providing a data signal to the pixels. The upper signal line includes a first upper signal line including a first metal material, a second upper signal line including a second metal material which is different from the first metal material, and a third upper signal line including the first metal material. The first, second and third upper signal lines are arranged in order and respectively electrically connected to a plurality of connection lines including the second metal material. The connection lines are connected to a plurality of lower signal lines.

A display device comprises a substrate including display and peripheral areas, a semiconductor element, a pixel structure, and a plurality of dummy patterns. The semiconductor element is disposed in the display area on the substrate, and the pixel structure is disposed on the semiconductor element. The dummy patterns which have stacked structure are disposed in the peripheral area on the substrate, and contain a material identical to a material constituting the semiconductor element. The dummy patterns are arranged in a grid shape in different layers, and each of the dummy patterns includes a central portion and an edge portion surrounding the central portion. The edge portions of dummy patterns which are adjacent to each other in the different layers among the dummy patterns are overlapped each other in a direction from the substrate to the pixel structure.

A display device is disclosed. In one aspect, the display device includes a display area configured to display an image, a peripheral area neighboring the display area, and at least one test element group (TEG) including a test thin film transistor (TFT) formed in the peripheral area and a plurality of test pads electrically connected to the test TFT. The display device also includes first to third dummy circuits separated from the test TFT, each of the first to third dummy circuits including a plurality of first dummy semiconductor layers and a plurality of first dummy gate electrodes overlapping at least a portion of the first dummy semiconductor layers in the depth dimension of the display device.

A display device includes a light emitting element including an anode, a cathode, and a light emitting layer between the anode and the cathode, a first transistor connected between the anode and a first power line, the first transistor may be switched by a voltage of a node, a second transistor connected between the first transistor and a data line, the second transistor may be switched by a write scan signal, a third transistor connected between the node and the anode, the third transistor may be switched by a compensation scan signal, a fourth transistor connected between the node and an initialization line, the fourth transistor may be switched by an initialization scan signal, an insulating layer on the first to the fourth transistors, and a light blocking pattern protruding from the insulating layer, the light blocking pattern being adjacent to the third transistor and the fourth transistor.

Display device and electronic device including the same

A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.

Display device and manufacturing method thereof

A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.

A display device includes a plurality of pixels. Each pixel includes a first transistor including a first gate electrode, a first source region, and a first drain region, a second transistor connected to the first source region of the first transistor, a third transistor connected to the first gate electrode and the first drain region of the first transistor, a fifth transistor connected to the first source region of the first transistor, and a sixth transistor connected to the first drain region of the first transistor. The pixels include a first pixel and a second pixel disposed adjacent to each other. The first and second pixels share a fourth transistor connected to the third transistor of the first pixel and the third transistor of the second pixel, and share a seventh transistor connected to the sixth transistor of the first pixel and the sixth transistor of the second pixel.

A pixel circuit includes a light-emitting element, a first transistor, a second transistor operating based on a first gate signal, a third transistor operating based on a second gate signal, a fourth transistor operating based on an initialization control signal, a fifth transistor operating based on an emission control signal, a sixth transistor operating based on the emission control signal, a seventh transistor, of which one terminal is connected to the light-emitting element, operating based on a bias control signal, an eighth transistor, of which one terminal is connected to the driving transistor, operating based on the bias control signal, a storage capacitor, and the light-emitting element. The circuit performs a display-scan operation where a driving time of a panel driving frame is a predetermined duration, and performs a display-scan operation and a self-scan operation where the driving time is longer than the predetermined duration.

Pixel circuit and method for improving image quality at low driving frequency

Growing community of inventors

Hwaseong-si, South Korea

Jeong-Soo Lee