Lg Semicon Co., Ltd.

Hyundai Electronics Industries Co. Ltd.

Goldstar Electron Co., Ltd.

Ig Semicon Co., Ltd.

Jeong Soo Byun

Byung Hak Lee

Sang Jun Choi

Hyung Jun Kim

Dong Kyun Sohn

Hak N Kim

Hyeong Joon Kim

A method for fabricating a semiconductor device improves step coverage and resistivity. The method includes the steps of forming a doped silicon layer on a substrate, forming a silicide layer containing more metal atoms than silicon atoms on the doped silicon layer, and heat treating in nitrogen to form a second silicide layer having a tetragonal phase crystal structure and a silicon nitride film on the top surface of the second silicide layer.

Method for fabricating semiconductor device having improved step coverage and low resistivity contacts

An electrode passivation layer of a semiconductor device and a method for forming the same having improved corrosion-resistance and oxidation-resistance are disclosed, the electrode passivation film including a semiconductor substrate; a conductive layer pattern formed on the semiconductor substrate; and an amorphous passivation film formed on the conductive layer pattern.

Electrode passivation layer of semiconductor device and method for forming the same

Method for fabricating a semiconductor device, is disclosed, which is suitable for improving a resistivity, including the steps of forming a silicon layer on a substrate, forming a crystalline metal silicide layer on the silicon layer, forming an amorphous metal silicide layer by injecting ions into the crystalline metal silicide layer, and crystallizing the amorphous metal silicide by heat treating the amorphous metal silicide.

Method for fabricating semiconductor device

The present invention relates to forming epitaxial Co self-align silicide for a semiconductor device. An epitaxial Co self-align suicide layer for a semiconductor device is formed by forming a buffer layer on a silicon substrate, depositing cobalt thereon and applying an annealing process thereto to restrain silicon and cobalt from radically reacting on each other when applying the annealing process after depositing cobalt on the silicon substrate. The buffer layer is formed by performing a surface treatment using CHF.sub.3 or O.sub.2 onto the silicon substrate, applying an ion implantation using carbon, fluorine or oxygen to the silicon substrate, or exposing the silicon substrate to oxygen plasma. The present invention has an effect of forming shallow junction for a scaling down process to improve the integration of the semiconductor device.

Method for forming epitaxial Co self-align silicide for semiconductor

A method for forming a silicide layer in a semiconductor device, including the steps of: forming a refractory metal layer on a semiconductor substrate; forming a cobalt layer on the refractory metal layer; implanting impurities in the interface between the refractory metal layer and the cobalt layer; heat treating the semiconductor substrate such that cobalt atoms from the cobalt layer pass through the refractory metal layer and form a cobalt silicide epitaxy layer on the semiconductor substrate; and removing the remaining cobalt layer and the remaining refractory metal layer.

Method for forming a silicide layer in a semiconductor device

A method of forming an electrode of a semiconductor device includes the steps of forming an insulating layer on a semiconductor substrate, forming a tungsten silicide layer on the insulating layer, implanting impurity ions into the tungsten silicide layer to form an impurity region in a lower portion of the tungsten silicide layer, and carrying out a heat treatment to the substrate on which the tungsten silicide layer is formed.

Method of forming electrode of semiconductor device

A method for the formation of gate in a semiconductor device is disclosed. The method for the formation of gate in a semiconductor device, comprising the steps of: forming amorphous silicon and polysilicon over a gate insulating film atop a semiconductor substrate, in due order; implanting impurity ions into the polysilicon and carrying out heat treatment; and forming a layer of a refractory metal over the silicon and carrying out heat treatment, to form polycide. Capable of preventing the degradation which is attributed to the penetration of impurities and thermal instability when forming a P.sup.+ polygate, the method contribute to the improvement in electrical properties.

Method for the formation of polycide gate in semiconductor device

A capacitor element includes a pervoskite dielectric film and an electrode having excellent electrical contact characteristic and improved adhesion to an underlying surface. In a method for fabricating the electrode, a group IVB or VB refractory metal transition element is deposited on a silicon substrate or a silicon oxide layer. A group VIII near noble metal transition element is then deposited on the group IVB or VB refractory metal layer. The substrate and deposited layers is then subjected to a heat treatment in an ammonia ambient to form a refractory metal nitride layer between the refractory metal and near noble metal layers. In addition, if the refractory metal is deposited on a silicon substrate, a silicide layer is formed between the refractory metal layer and the substrate during heat treatment. If, however, the refractory metal layer is provided on a silicon oxide layer, a refractory metal oxide is formed during the heat treatment. Examples of group IVB refractory metal transition elements include Ti, Zr and Hf; examples of group VIII refractory metal transition elements include Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, and Pt; and examples of the group VB refractory metals include V, Nb, and Ta.

Method for forming a semiconductor device electrode which also serves as

A method for forming a refractory metal nitride film having excellent diffusion barrier properties suitable for a dielectric electrode includes a step of depositing a refractory metal film containing nitrogen on a silicon substrate in a mixed gas atmosphere of Ar and N.sub.2, such that the volumetric content of the nitrogen in the mixed gas does not exceed 20%, and a step of forming a completed refractory metal film by subjecting the refractory metal film to a heat treatment in an N.sub.2 or NH.sub.3 atmosphere. The content of nitrogen in the refractory metal film depends on the content of nitrogen in the ambient gas, and the ratio of nitrogen contained in the refractory metal film to the refractory metal does not exceed unity. The refractory metals may be any of the transition metals in Groups IVB, VB, and VIB of the periodic table.

Method for forming refractory metal nitride film

A method for forming platinum silicide plugs suitable for use in very large scale integrated semiconductor devices having large aspect ratios. The method includes the steps of: providing a silicon substrate on which a conductive layer is formed; forming an insulating layer on the silicon substrate and the conductive layer; patterning the insulating layer to form a contact hole on the conductive layer; exposing the conductive layer to air to thereby form a thin native oxide layer on the conductive layer; forming a blanket polysilicon film on the entire resulting structure thick enough to completely fill the contact hole; etching back the blanket polysilicon film to expose the insulating layer, thereby forming a silicon plug in the contact hole; forming a platinum layer on the silicon plug and the insulating layer; performing heat treatment to thereby convert the silicon plug to a platinum silicide plug; and thereafter removing the remaining platinum layer.

Method for forming platinum silicide plugs

A method for fabricating an MOS transistor having a source/drain region of shallow junction and a thin silicide film is disclosed. The present method takes advantage of the phase separation of the Ti-excessed titanium nitride film and is capable of forming a thin silicide film in a once metal thermal annealing process. The method employs dopant implant to the titanium nitride and silicide and thermal anneal for diffusion to form source and drain regions.

Method for fabricating MOS transistor having source/drain region of

A method for forming a fine titanium nitride film and a method for fabricating a semiconductor element using this method. The method for forming a fine titanium nitride film includes the steps of depositing a titanium nitride film on a semiconductor substrate such as with a reactive sputtering method, introducing oxygen into the columnar structured grain boundaries of the titanium nitride film such as by exposing the titanium nitride film to atmosphere, depositing a titanium film on the titanium nitride film having oxygen stuffed therein, converting the titanium film into a fine titanium nitride film by subjecting the titanium film to two times of a heat treatment process. In case a COB DRAM element bit line is formed of tungsten, the fine titanium nitride film and the underlying oxygen-stuffed titanium nitride film, serving as barriers for preventing high temperature diffusion of the tungsten, allow a tungsten bit line having excellent contact and barrier properties. In case the fine titanium nitride film is used as an MOS transistor gate, a gate which can satisfy the thermal stability of a polysilicon as well as the low resistivity of a silicide may be obtained.

Method for forming fine titanium nitride film and method for fabricating

A method for fabricating an MOS transistor includes the steps of forming a gate insulating layer on a substrate of a first conductivity-type, forming a gate on the gate insulating layer, forming a disposable layer over an entire surface of the substrate and the gate, the disposable layer having a first conductivity-type impurity and a second conductivity-type impurity of a higher concentration than that of the first conductivity-type impurity, and forming a source and drain area of the second conductivity-type impurity on the substrate by diffusing the second conductivity-type impurity of the disposable layer into the substrate by means of an annealing process, wherein the disposable layer includes a BPSG layer, wherein the BPSG layer is a B+PSG layer which is doped with a higher dopant concentration of boron than that of phosphorus to make a p-type MOS transistor.

Method for fabricating MOS transistor utilizing doped disposable layer

A method for forming a fine-textured titanium nitride film and fine-textured titanium nitride/thin titanium silicide films, and methods for fabricating semiconductor elements utilizing the same are disclosed. A thin titanium silicide film and a fine-textured nitride film are formed on a semiconductor substrate through depositing a titanium film containing nitrogen on the semiconductor substrate by sputtering a titanium target having a titanium nitride film formed thereon and quenching. A bit line of a COB DRAM element may be formed of tungsten, and a tungsten bit line having good contact characteristics and preserved barrier characteristics can be formed since the fine-textured titanium nitride/thin titanium silicide films may serve as a barrier preventing the tungsten from diffusing at high temperature during subsequent capacitor forming processes. The fine-textured titanium nitride/thin titanium silicide films may be applied to an aluminum wiring, and the titanium silicide formed at the contact part may improve the contact characteristics, and TiAl.sub.3 formed between the titanium nitride film and the aluminum wiring may improve the electromigration characteristics of the metal wiring.

Method for forming TiN film and TiN film/thin TiSi.sub.2 film, and

A method for fabricating an MOS transistor includes the steps of forming a gate insulating layer on a substrate of a first conductivity-type, forming a gate on the gate insulating layer, forming a disposable layer over an entire surface of the substrate and the gate, the disposable layer having a first conductivity-type impurity and a second conductivity-type impurity of a higher concentration than that of the first conductivity-type impurity, and forming a source and drain area of the second conductivity-type impurity on the substrate by diffusing the second conductivity-type impurity of the disposable layer into the substrate by means of an annealing process, wherein the disposable layer includes a BPSG layer.

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Chungcheongbuk-do, South Korea

Jeong Soo Byun