Samsung Electronics Co., Ltd.

Jeong-sik Choi

Cha-young Yoo

Jae-hyoung Choi

Jung-hee Chung

Sung-Tae Kim

Se-hoon Oh

Se-Hoon Oh

Young-sun Kim

Ki-chul Kim

Sang-Hoon Kim

Woo-Gwan Shim

Jong-Ho Park

Jeong-hee Chung

Nam-Myun Cho

Oui-serg Kim

Hyo-soo Kim

Dong-kyun Park

Kun-bum Park

Young-hwan Yoon

An electromagnetic actuator includes a first body which includes a biased permanent magnet, a magnetic path control device which is disposed to adjust a magnetic path produced by the biased permanent magnet, at least one core which is disposed to face the biased permanent magnet and the magnetic path control device, and a coil which is wound on the at least one core so as to reinforce or cancel the magnetic path produced by the biased permanent magnet; and a second body which is separated from the biased permanent magnet and the magnetic path control device when the at least one core is between the second body and at least one of the biased permanent magnet and the magnetic path control device.

Electromagnetic actuator

Integrated circuit devices, for example, dynamic random access memory (DRAM) devices, are provided including an integrated circuit substrate having a cell array region and a peripheral circuit region. A buried contact plug is provided on the integrated circuit substrate in the cell array region and a resistor is provided on the integrated circuit substrate in the peripheral circuit region. A first pad contact plug is provided on the buried contact plug in the cell array region and a second pad contact plug is provided on the resistor in the peripheral circuit region. An ohmic layer is provided between the first pad contact plug and the buried contact plug and between the second pad contact plug and the resistor. Related methods of fabricating integrated circuit devices are also provided.

Integrated circuit devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate

A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a metal-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower electrode during, for example, backend processing used to form upper levels of metallization/structures in an integrated circuit including the MIM type capacitor. Nitrogen included in the metal-oxy-nitride seed dielectric layer can reduce the type of reaction, which may occur in conventional type MIM capacitors. A metal-oxide main dielectric layer can be formed on the metal-oxy-nitride seed dielectric layer and can remain separate from the metal-oxy-nitride seed dielectric layer in the MIM type capacitor. The metal-oxide main dielectric layer can be stabilized (using, for example, a thermal or plasma treatment) to remove defects (such as carbon) therefrom and to adjust the stoichiometry of the metal-oxide main dielectric layer.

Methods of forming metal-insulator-metal (MIM) capacitors with separate seed

A MIM capacitor can include a doped polysilicon contact plug in an interlayer insulating film. A lower electrode of the MIM capacitor includes a transition metal nitride film is on the doped polysilicon contact plug. A transition metal silicide film is between the doped polysilicon contact plug and the transition metal nitride film.

Metal-insulator-metal capacitors including transition metal silicide films on doped polysilicon contact plugs

Methods of forming integrated circuits devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate

Embodiments of the present invention include methods of forming a contact to a capacitor in a semiconductor device. A metal silicide layer is formed at a top surface of a conductive plug of the semiconductor device that is coupled to a bottom electrode of the capacitor to provide an ohmic contact therebetween. Forming a metal silicide layer may include exposing a surface of the conductive plug, depositing a metal layer of the bottom electrode on the exposed surface of the conductive plug and thermally processing the semiconductor device to react a part of the deposited metal layer and the conductive plug to form the metal silicide layer. Methods of forming a semiconductor device including a capacitor having a metal silicide layer connecting a bottom electrode of the capacitor and a conductive plug are also provided.

Methods of forming a semiconductor device including a metal silicide layer between a conductive plug and a bottom electrode of a capacitor

Methods of forming metal-insulator-metal type capacitors in integrated circuit memory devices can include crystallizing an HfOdielectric layer on a lower electrode of a capacitor structure in a low temperature plasma treatment at a temperature in range between about 250 degrees Centigrade and about 450 degrees Centigrade. An upper electrode can be formed on the HfOdielectric layer.

Methods of forming MIM type capacitor structures using low temperature plasma processing

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Seoul, South Korea

Jeong-sik Choi