Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Samsung Displayco., Ltd.

Jeong Keun Ahn

Shaofeng Ding

Junjung Kim

A transceiver system includes a transmitter including a first driving signal output unit and a second driving signal output unit and a receiver including a first sensing signal input unit and a second sensing signal input unit. A first channel includes a first input/output line and a second input/output line that connect the first driving signal output unit and the first sensing signal input unit, and are configured to transfer signals having different phases; a second channel including a third input/output line and a fourth input/output line that connect the second driving signal output unit and the second sensing signal input unit, and are configured to transfer signals having different phases; and a first compensation capacitor including a first electrode electrically connected to the second input/output line and a second electrode electrically connected to the third input/output line.

Transceiver system for reducing noise influence between adjacent channels

A comparator includes: a first selector for selecting one of a first reference voltage and a first correction reference voltage, based on a first determination value of data at a past time of a first adjacent channel; a first comparator for comparing the difference between a voltage selected from the first reference voltage and the first correction reference voltage and a second reference voltage with an input voltage at a current time of a target channel; and a first output unit for determining an output voltage at the current time of the target channel, based on the comparison result of the first comparator.

Comparator and receiver including the same

A clock data recovery unit includes: a phase corrector generating a first compensation clock signal and a second compensation clock signal based on an external clock signal; and a transition detector, wherein the transition detector comprises: a first integrator configured to integrate a first training pattern signal according to the first compensation clock signal to provide a first integration signal; and a second integrator configured to integrate the first training pattern signal according to the second compensation clock signal to provide a second integration signal, wherein, in response to the first integration signal being greater than a first reference voltage and the second integration signal being less than the first reference voltage, occurrence of a transition of the first training pattern signal is detected.

Clock data recovery unit

A transition detector includes a first integrator configured to provide a first integral signal by integrating a first training pattern signal according to a first compensation clock signal, a second integrator configured to provide a second integral signal by integrating the first training pattern signal according to a second compensation clock signal, and a third integrator configured to provide a third integral signal by integrating the first training pattern signal according to a third compensation clock signal, wherein occurrence of a transition of the first training pattern signal is detected when the first integral signal and the second integral signal are larger than, and the third integral signal is smaller than, a first reference voltage.

Transition detector and clock data recovery unit including the same

A receiver may include a plurality of receiving units connected with corresponding channels, and a clock data recovery unit connected with a sensing channel among the channels via a sensing line and connected with the receiving units via a common clock line. The receiving units may receive training pattern signals having the same transition direction through the channels in a training mode, and, in the training mode the clock data recovery unit may generate a phase-adjusted sampling clock signal so that a sampling time corresponds to a transition time of a training pattern signal of the sensing channel.

Receiver and transceiver including the same

Provided herein may be a receiver and a compensation method using the same. The receiver may be coupled to a transmitter through a plurality of channels, and may include a decoder configured to sample a received signal of a corresponding channel of the channels at a sampling point, and a controller configured to provide to the decoder a sampling clock signal for determining the sampling point, measure a level of the received signal having a transition direction that is identical to that of an adjacent received signal of an adjacent channel of the channels at the sampling point, during a compensation period, and adjust a phase of the sampling clock signal such that the measured level is at an intermediate level among variable levels of the received signal, during the compensation period.

Receiver and compensation method using the same

A test structure for manufacturing a semiconductor device includes a test element, a first pad connected to the test element, and a second pad connected to the test element. A first wire is connected to the test element, and the first wire and the test element are part of a first layer disposed on a semiconductor substrate. A second wire is connected to the first wire, and is part of a second layer disposed on the semiconductor substrate, and the second layer is different from the first layer.

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Yongin-si, South Korea

Jeong Keun Ahn