Hynix Semiconductor Inc.

Skhynix Inc.

Sk Marketing & Company, Co., Ltd

Jeong-Hun Lee

Jeong-Tae Hwang

Yong-Mi Kim

Jeong-Tea Hwang

Do-Sung Kim

Sun-Ki Cho

Jee-Yeon Keh

Kwan-Sik Yoo

Seung-Woo Chung

Dong-Soon Min

A semiconductor memory device includes a reference voltage generation block suitable for selecting and outputting one of a plurality of reference voltages in response to a voltage division enable signal, as an input reference voltage, in response to a selection enable signal; and a control signal generation block suitable for generating the voltage division enable signal and the selection enable signal in response to a reference voltage information.

Semiconductor memory device and operating method thereof

A semiconductor device includes an internal voltage generation unit configured to generate an internal voltage in response to an enable signal, an enable setting logic unit configured to define a starting time point for generating the internal voltage in response to the enable signal, a monitoring unit configured to monitor whether or not the internal voltage reaches a target level, and define an ending time point for generating the internal voltage in response to the monitoring result, and a measurement result signal generation unit configured to generate a measurement result signal corresponding to a developing time of the internal voltage in response to an output signal of the enable setting logic unit and an output signal of the monitoring unit.

Semiconductor device and method for driving the same

A semiconductor device includes a data storage unit configured to receive input data, outputs the input data with a difference in voltage level between logic levels, and output comparison data whose logic level is distinguished from the input data; a test operation unit configured to determine a logic level of test data periodically in response to a data reference voltage whose voltage level is determined in response to a level test code during a test operation period defined by a test entry command and a test exit command, and generate a test result signal by comparing a logic level of the comparison data with the logic level of the test data; and a test operation sensing signal generation unit configured to generate a test operation sensing signal that is activated in response to the test entry command and inactivated in response to the test result signal.

Semiconductor device, semiconductor system having the same and operating method thereof

A method of testing a semiconductor memory device comprises receiving a clock, addresses, commands, and data from a test device through channels, generating an internal bank address in response to the addresses and the commands, performing a multi-bit parallel test for each of a plurality of banks based on the addresses, the commands, the data, and the internal bank address, and providing the test device with a test result signal.

Semiconductor memory device, method of testing the same and system of testing the same

A semiconductor memory device is capable of performing a test operation in its various operation modes. Particularly, the semiconductor memory device can enter a test mode in other modes, as well as, an all bank pre-charge mode. The semiconductor memory device includes a test mode control block configured to generate a test signal enabled for a predetermined interval in an active mode, and a mode register set control block configured to enable a mode register set signal for a test operation in the predetermined interval in response to the test signal.

Semiconductor memory device

A voltage stabilization circuit of a semiconductor memory apparatus includes an operation speed detecting unit configured to detect an operation speed of the semiconductor memory apparatus to generate a detection signal, and a voltage line controlling unit configured to interconnect a first voltage line and a second voltage line in response to the detection signal.

Voltage stabilization circuit and semiconductor memory apparatus using the same

A semiconductor memory apparatus according to the embodiment includes a test mode controller, a first data alignment unit, a decoder, a test executing unit and a second data alignment unit. The test mode controller is configured to generate test enable signals in response to a test mode setting signal and a read command. The first data alignment unit is configured to parallely align first input data that are input in series, generate first alignment data, and transmit it to the first data driver. The decoder is configured to decode the first alignment data in response to the test enable signal and generate the decoding signal. The test executing unit is configured to execute the preset test mode in response to the decoding signal. The second data alignment unit is configured to parallely align second input data, which are input in series, in response to the test enable signal, generate second alignment data, and transmit it to a second data driver.

Semiconductor memory apparatus and method of testing the same

An apparatus for testing setup/hold time includes a plurality of data input units, each configured to calibrate setup/hold time of input data in response to selection signals and setup/hold calibration signals, and an off-chip driver calibration unit configured to generate the selection signals and the setup/hold calibration signals by using the input data input of one of the plurality of data input units.

Apparatus and method for testing setup/hold time

A QoS call routing system using a counselor and a speech recognition engine comprises a speech recognition engine for recognizing speech and outputting characters and speech recognition results; a first counselor group terminal for reproducing the client's speech file to a counselor of a first counselor group so that the counselor may recognize the speech when the speech recognition result by the speech recognition engine is less than a reference value; a second counselor group terminal for allowing a counselor of a second counselor group to hear the client's speech so that the counselor may recognize the speech when the recognition by the counselor of the first counselor group has failed; and an IVR server for controlling the engine and terminals to provide information to the client.

Growing community of inventors

Gyeonggi-do, South Korea

Jeong-Hun Lee