Samsung Electronics Co., Ltd.

Dongwoo Fine-chem Co., Ltd.

Jeong Ho Yoo

Sun Jung Kim

Jin Bum Kim

Dong Suk Shin

Cho Eun Lee

Tae Jin Park

Seok Hoon Kim

Gyeom Kim

Young Dae Cho

Jong Min Lee

Hyun Jung Lee

Dong Chan Suh

Su Jin Jung

Kang Hun Moon

Keum Seok Park

Pan Kwi Park

Han Young Choi

Il Gyou Shin

Bong Jin Choi

Kyoung Moon Jung

Jong Ryeol Yoo

Jae Myung Choe

Ha Kyu Seong

Joong Han Kum

Yi Hwan Kim

Yong Uk Jeon

A semiconductor includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns, and gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns, wherein the source/drain pattern includes a first epitaxial region having at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and a thickness of the bottom part increasing and decreasing away from the gate structures in the second direction, and a second epitaxial region on the first epitaxial region, the second epitaxial region including phosphorus.

Semiconductor device

A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.

Semiconductor process chamber including lower volume upper dome

A semiconductor device and a method of manufacturing a semiconductor device, the device including an active pattern protruding from a substrate; a plurality of gate structures each including a gate electrode and crossing the active pattern; and a source/drain region between the plurality of gate structures, wherein the source/drain region includes a high concentration doped layer in contact with a bottom surface of a recessed region in the active pattern, a first epitaxial layer in contact with an upper surface of the high concentration doped layer and a sidewall of the recessed region, and a second epitaxial layer on the first epitaxial layer, and the high concentration doped layer has a first area in contact with the bottom surface of the recessed region and a second area in contact with the sidewall of the recessed region, the first area being wider than the second area.

Semiconductor device including fin field effect transistor and method of manufacturing the same

An pressure sensitive adhesive composition according to the present invention includes: an acrylic copolymer; a multifunctional acrylate-based compound; and a photoinitiator, in which the acrylic copolymer includes a repeating unit derived from an acrylate-based monomer having a Tg of &#x2212;20&#xb0; C. or less and a repeating unit derived from an unsaturated carboxylic acid monomer, and the repeating unit derived from the unsaturated carboxylic acid monomer is included in an amount of 10 to 50 parts by weight based on the total 100 parts by weight of the acrylic copolymer.

Pressure sensitive adhesive composition and pressure sensitive adhesive pattern formed therfrom

A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a channel pattern on a substrate, the channel pattern extending in a first direction; a gate pattern on the substrate, the gate pattern extending in a second direction crossing the first direction and surrounding the channel pattern; and an interface layer between the channel pattern and the gate pattern, the interface layer being formed on at least one surface of an upper surface and a lower surface of the channel pattern.

Semiconductor device including channel pattern and manufacturing method thereof

A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage.

Method of fabricating semiconductor device

A semiconductor device includes: a substrate having an active region; a gate structure disposed in the active region; source/drain regions respectively formed within portions of the active region disposed on both sides of the gate structure; a metal silicide layer disposed on a surface of each of the source/drain regions; and contact plugs disposed on the source/drain regions and electrically connected to the source/drain regions through the metal silicide layer, respectively. The metal silicide layer is formed so as to have a monocrystalline structure.

Growing community of inventors

Hwaseong-si, South Korea

Jeong Ho Yoo