Samsung Electronics Co., Ltd.

Jeong-Gi Jin

Ju-Il Choi

Kwang-Jin Moon

Tae-Seong Kim

Jeong-Woo Park

Jae-Hwa Park

Suk-chul Bang

Byung-Iyul Park

Joo-Hee Jang

Ho-Joon Lee

Hyung-Seok Kim

Ji-Woong Sue

Sung-hee Kang

Ui-Hyoung Lee

Provided are a semiconductor device, a semiconductor package, and an electronic system. The device includes a substrate having a front side and a back side disposed opposite the front side. An internal circuit is disposed on or near to the front side of the substrate. Signal I/O through-via structures are disposed in the substrate. Back side conductive patterns are disposed on the back side of the substrate and electrically connected to the signal I/O through-via structures. A back side conductive structure is disposed on the back side of the substrate and spaced apart from the signal I/O through-via structures. The back side conductive structure includes parallel supporter portions.

Semiconductor device, semiconductor package, and electronic system

Integrated circuit (IC) devices are provided including: a first multi-layer wiring structure including a plurality of first wiring layers in a first region of a substrate at different levels and spaced apart from one another, and a plurality of first contact plugs between the plurality of first wiring layers and connected to the plurality of first wiring layers; a through-silicon via (TSV) landing pad including a first pad layer in a second region of the substrate at a same level as that of at least one first wiring layer from among the plurality of first wiring layers, and a second pad layer at a same level as that of at least one first contact plug from among the plurality of first contact plugs and contacts the first pad layer; a second multi-layer wiring structure on the TSV landing pad; and a TSV structure that passes through the substrate and is connected to the second multi-layer wiring structure through the TSV landing pad.

Integrated circuit devices including a through-silicon via structure and methods of fabricating the same

The inventive concept provides methods for inhibiting the formation of one or more oxides on metal bumps during the formation of solder joint structures and solder joint structures including one or more preservative films. In some embodiments, the solder joint structure includes a metal bump having a preservative film disposed on the surface thereof.

Joint structures having organic preservative films

Growing community of inventors

Osan-si, South Korea

Jeong-Gi Jin