Infineon Technologies Ag

Jens Polney

Kazimierz Szczypinski

Florian Schnabel

Andre Schäfer

An integrated circuit, in particular an integrated memory circuit, has an input circuit for the purpose of receiving a signal. The input circuit has an activation input for an activation signal in order to activate the input circuit, in a manner dependent on the activation signal, for the purpose of receiving signals.

Integrated circuit having an input circuit

Address decoding circuit and method for addressing a regular memory area and a redundant memory area in a memory circuit are provided. One embodiment provides a method for addressing memory areas in a memory circuit with successive addresses, with either a regular memory area or a redundant memory area being addressed depending on the address, with an inactive state of a deactivation signal being set when addressing the regular memory area, which inactive state allows the addressing of the regular memory area, with the addressing of the regular memory area being blocked on the basis of an active state of the deactivation signal when addressing the redundant memory area, wherein a change is made from the active state of the deactivation signal to the inactive state of the deactivation signal before the application of the next address for addressing one of the memory areas.

Address decoding circuit and method for addressing a regular memory area and a redundant memory area in a memory circuit

In integrated circuits with internally generated supply voltages, during the run-up of the internal voltage generators, unintentionally high currents can arise through switching stages connected to the internal supply voltage. A control circuit provides for the initialization of the switching stages during power-up. The control circuit contains an inverter that, in signal terms, can be driven by a precharge signal and, on the supply voltage side, is connected to the internal supply voltage via respective transistors. During power-up, the transistors are switched off and then switched on. The precharge signal is forwarded to the switching stage via a further inverter.

Circuit configuration with internal supply voltage

A method for testing electronic components includes the step of outputting test output data for the tested electronic components on a test board without activating individual scan lines or individual scan signals. Starting from a first activated electronic component successively the following electronic components are activated one after another by passing an activation signal from electronic component to electronic component. A device for testing electronic components is also provided.

Method and device for testing electronic components

In a random access memory, a sequence of selection signals for a combined multi-memory operating functionality is supplied on control lines which connect the control logic to each memory cell in a cell field when the memory is in a combined multi-memory operating mode, and a sequence of selection signals for the write enable functionality is supplied when the memory is in the single-memory operating mode.

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Munich, Germany

Jens Polney