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Biotronik Mess- Und Therapieger&auml;te Gmbh & Co. Ingenieurb&uuml;ro Berlin

Biotronik Mess-und Therapiegeraete Gmbh Ingeniurbuero Berlin

Jens Gobrecht

Jan Voboril

Peter Roggwiller

Horst Gruning

Arno Neidig

Roland Sittig

Bruno Broich

Klaus Bunk

Max Schaldach

Curt Kranz

Klaus-Peter Schmitz

Alexander Rzany

Detlef Behrend

Georg F Wahl

Claus Schuler

Reinhold Bayerer

Max Schaldach, Jr

Thomas Stockmeier

Marco Rossinelli

Karl-Heinz Thiele

Georg Nippert

Berthold Hahn

C Christiaan Abbas

A method of applying a marker element () to an implant (), in particular a stent, intended for implantation in the human or animal body, comprising a main body and an opening () provided in said main body () for receiving the marker element (), wherein to form at least a part of the marker element () a hardenable material or material mix is introduced into the opening and hardened therein.

Method of applying a marker element to an implant and an implant provided with a marker element

An apparatus for the automatic performance of diagnostic and/or therapeutic actions in body cavities is provided with a base control unit, which is to be arranged extracorporally, and with a catheter-type actuator, which is coupled therewith and which is insertable in the corresponding body cavity and which, in the vicinity of its distal end, is provided with a diagnostically active detection equipment and/or a therapeutically active treatment equipment, and which, at least in the vicinity of its distal end, is provided with an actuation mechanism, which is triggered by the base control unit, for advance and/or twist and turn control of the actuator.

Apparatus for the automatic performance of diagnostic and/or therapeutic actions in body cavites

In a large-area controlled-turn-off high-power semiconductor component containing a multiplicity of finely structured individual components, a semiconductor device (12) is formed by a multiplicity of small-area semiconductor chips (7) which are accommodated alongside one another in a common housing (13) and connected in parallel. This achievement avoids problems of yield with structures which are becoming finer.

Controlled-turn-off high-power semiconductor component

A gate-turn-off power semiconductor device of the GTO or FCTh type, having a control zone of alternately arranged finely subdivided cathode fingers and gate trenches, wherein the gate trenches are constructed as narrow deep slots, preferably by a crystal-direction-selective wet chemical etching process, while the original substrate surface is retained in the remaining area of the semiconductor substrate. Compared with the conventional 'recessed-gate' construction, this quasi-planar construction offers a number of advantages in the electrical behavior, in the integration of auxiliary functions and in the production.

Semiconductor gate-controlled high-power capability bipolar device

In a semiconductor component, which has various differently doped layers (2, 3, 4, 5) within a semiconductor substrate, an improvement of the electrical properties is achieved, wherein the thickness of the substrate in the current-carrying region is locally reduced by a deep etch well (10), the original mechanical stability of the semiconductor substrate largely remaining retained.

Semiconductor component

A field-controlled thyristor having a sequence of layers consisting of anode layer, channel layer and gate regions and cathode regions, which regions are alternately arranged at the cathode side, wherein an improvement in the turn-off gain is achieved by a p-type doping of the side walls of the troughs which separate the cathode regions from each other, and/or by an additional intermediate layer which has low p-type doping and which is arranged between adjacent gate regions.

Disconnectable power semiconductor component

A process for manufacturing a power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. According to the process for manufacturing the component, the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

Process for manufacturing a power semiconductor component

A power semiconductor module including a cascade circuit of a low-voltage high-current MOSFET and of a bipolar semiconductor element, for example a field-controlled thyristor, GTO thyristor or Darlington transistor, as a hybrid combination. In this manner, it is possible to achieve a construction, which exhibits low induction and which saves space and which at the same time permits efficient cooling of the module.

Power semiconductor module

A power semiconductor module includes a multi-layered substrate formed of a first ceramic bottom plate, at least one second ceramic plate disposed above and parallel to the first ceramic bottom plate, a metal foil in the form of a textured metallization located between and directly bonded to the ceramic plates, the second ceramic plate having cutouts formed therein, and assembly elements soldered in the cutouts.

A coating layer (2) for semiconductor technology having an edge contour which has a wedge-shaped cross section is produced by predominantly anisotropic dry etching of the coating layer (2) through a mask (4) disposed in front of the coating layer (2) at a finite mask distance (A). The coating layer (2) etched in this manner is especially well suited as an insulating substrate for a field plate in the edge region of a P-N junction emerging at the surface and also as implantation mask for producing a P-N junction with lateral doping gradients.

Method for producing a coating layer for semiconductor technology and

A semiconductor power module includes a substrate formed of metallized ceramic, at least one semiconductor power component with a base surface soldered to the metallized ceramic, and at least one heat conduit integrated into the semiconductor power module. The heat conduit includes a condensation area having a larger surface than the base surface, over which dissipation heat from the semiconductor power component is distributed.

Semiconductor power module

A semiconductor power module includes at least two mutually parallel ceramic substrates each having two sides, metallizations disposed on at least one side of each of the substrates, at least one controlled semiconductor power component disposed between each two respective substrates and contacted by the metallizations above and below the component, the substrate above the component having at least one hole formed therein above the component for accommodting control connections to the component.

In a dry etching process for patterning a substrate (2), an etching mask (4) consisting of a chemically deposited oxide, for example Al.sub.2 O.sub.3, is used and the etching is carried out in a fluorine-containing plasma. By this means, etching selectivities of more than 100 are achieved for a substrate (2) of silicon.

Dry etching process

A collector for electric machines, including a rotationally symmetrical sintered ceramic body and a plurality of radially disposed metallic segments which are separated from each other by one interspace each and which are bonded to the ceramic body via a eutectic intermediate layer. The segments are bonded to the ceramic body in accordance with the eutectic method by being surface-oxidized on their inside narrow side and radially pressed against the ceramic body with the totality being brought to the melting temperature corresponding to the metal/metal-oxide eutectic and subsequently being cooled down again. A preferred embodiment includes: copper segments on an Al.sub.2 O.sub.3 ceramic body.

Collector for an electric machine and method for its production

A power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first and second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. The invention further includes a process for manufacturing the component, wherein the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

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Gebenstorf, Switzerland

Jens Gobrecht