Osram Oled Gmbh

Osram Opto Semiconductors Gmbh

Ams-osram International Gmbh

Osram Oledgmbh

Jens Ebbecke

Petrus Sundgren

Ines Pietzonka

Andreas Biebersdorf

Christoph Klemp

Roland Zeisel

Philipp Kreuter

Alfred Lell

Sven Gerhard

Clemens Vierheilig

Harald König

Tobias Meyer

Sebastian Taeger

Ivar Tångring

Michael Binder

Anton Vogl

Holger Specht

Claudia Kauss

Martin Hetzl

Uwe Strauß

Embodiments provide a method for treating a semiconductor wafer comprising a set of aluminum gallium indium phosphide light emitting diodes (AlGaInP-LEDs) to increase a light generating efficiency of the AlGaInP-LEDs, wherein each AlGaInP-LED includes a core active layer for light generation sandwiched between two outer layers, the core active layer having a central light generating area and a peripheral edge surrounding the central light generating area, wherein the method includes treating the peripheral edge of the core active layer of each AlGaInP-LED with a laser beam thereby increasing a minimum band gap in each peripheral edge to such an extent that, during operation of the AlGaInP-LED, an electron-hole recombination is essentially confined to the central light generating area.

Method of laser treatment of a semiconductor wafer comprising AlGaInP-LEDs to increase their light generating efficiency

In an embodiment, an edge-emitting semiconductor laser diode includes a growth substrate, a semiconductor layer sequence located on the growth substrate, the semiconductor layer sequence having an active layer and an etch stop layer and two facets located opposite each other, wherein the facets bound the semiconductor layer sequence in a lateral direction, wherein the semiconductor layer sequence includes two edge regions adjoining the facets and a central region directly adjoining both edge regions, wherein, within each of the edge regions, a volume fraction of the active layer in the semiconductor layer sequence is smaller than in the central region, wherein the active layer is spaced apart from one facet, wherein a distance of the active layer to the facet varies along a direction parallel to this facet, and wherein the etch stop layer is arranged between the growth substrate and the active layer.

Edge-emitting semiconductor laser diode and method of manufacturing the same

In at least one embodiment, the environment sensor for sensing at least one environment parameter includes a semiconductor layer sequence, a sheath, the index of refraction of which changes as a function of the environment parameter, and a first electrical contact and a second electrical contact for supplying current to the semiconductor layer sequence. The semiconductor layer sequence has the shape of a generalized cylinder having a main axis. In directions perpendicular to the main axis, the semiconductor layer sequence is at least partly covered by the sheath. The semiconductor layer sequence has an index of refraction which is greater than the index of refraction of the sheath. The semiconductor layer sequence is designed to form laser modes within the environment sensor. Furthermore, the environment sensor is designed such that, in its normal operation, a change in the index of refraction of the sheath causes a change in the electrical resistance of the semiconductor layer sequence as a result of a change in radiation losses within the semiconductor layer sequence.

Environment sensor, measuring device and method for operating a measuring device

In an embodiment a method for manufacturing a semiconductor device include providing a growth substrate, depositing an n-doped first layer, depositing an active region on the n-doped first layer, depositing a second layer onto the active region, depositing magnesium (Mg) in the second layer and subsequently to depositing Mg, depositing zinc (Zn) in the second layer such that a concentration of Zn in the second layer decreases from a first value to a second value in a first area of the second layer adjacent to the active region, the first area being in a range of 5 nm to 200 nm.

Method for manufacturing a semiconductor device and optoelectronic device

An optoelectronic semiconductor device and a method for manufacturing an optoelectronic semiconductor device are disclosed. In an embodiment an optoelectronic semiconductor device includes a semiconductor body having a first region of a first conductive type, an active region configured to generate electromagnetic radiation, a second region of a second conductive type and a coupling-out surface configured to couple-out the electromagnetic radiation, wherein the first region, the active region and the second region are arranged along a stacking direction, wherein the active region extends from a rear surface opposite the coupling-out surface to the coupling-out surface along a longitudinal direction transverse to or perpendicular to the stacking direction, and wherein the coupling-out surface is arranged plane-parallel to the rear surface.

Optoelectronic semiconductor device and method of manufacturing an optoelectronic semiconductor device

The invention relates to an edge emitting laser diode comprising a semiconductor layer stack whose growth direction defines a vertical direction, and wherein the semiconductor layer stack comprises an active layer and a waveguide layer. A thermal stress element is arranged in at least indirect contact with the semiconductor layer stack, the thermal stress element being configured to generate a thermally induced mechanical stress in the waveguide layer that counteracts the formation of a thermal lens.

Edge emitting laser diode and method for producing same

In an embodiment, the gain-guided semiconductor laser includes a semiconductor layer sequence and electrical contact pads. The semiconductor layer sequence includes an active zone for radiation generation, a waveguide layer, and a cladding layer. The semiconductor layer sequence further includes a current diaphragm layer which is electrically conductive along a resonator axis (R) in a central region and electrically insulating in adjoining edge regions. Transverse to the resonator axis (R), the central region includes a width of at least 10 μm and the edge regions includes at least a minimum width. The minimum width is 3 μm or more. Seen in plan view, the semiconductor layer sequence as well as at least one of the contact pads on the semiconductor layer sequence are continuous components extending in the central region as well as on both sides at least up to the minimum width in the direction transverse to the resonator axis (R) adjoining the central region and beyond the central region.

Gain-guided semiconductor laser and method of manufacturing the same

A light-emitting diode chip that includes an epitaxial semiconductor layer sequence having an active region that generates electromagnetic radiation during operation, and a passivation layer comprising magnesium oxide and magnesium nitride. The passivation layer may be applied to a lateral surface of the semiconductor layer sequence, and the passivation layer covering at least the active region.

Light-emitting diode chip, and method for manufacturing a light-emitting diode chip

A method of manufacturing an optoelectronic semiconductor chip includes providing a growth substrate, growing a semiconductor layer sequence on the growth substrate, depositing a metallization on a side of the semiconductor layer sequence remote from the growth substrate, depositing a layer on the metallization, coupling a carrier to the layer on a side of the layer remote from the semiconductor layer sequence, separating the growth substrate from the semiconductor layer sequence, depositing an electrically conductive layer on a side of the semiconductor layer sequence facing away from the carrier, separating the carrier from the layer, thereby forming a layer stack with the metallization, the semiconductor layer sequence, the electrically conductive layer and a coupling layer including at least a part of a further material of the layer remaining on a side of the metallization remote from the semiconductor layer sequence, and coupling the layer stack to a chip carrier.

Method of producing an optoelectronic semiconductor chip and optoelectronic semiconductor chip

An optoelectronic semiconductor device and a method for manufacturing an optoelectronic semiconductor device are disclosed. In an embodiment an optoelectronic semiconductor device includes a semiconductor body comprising a first region of a first conductive type, an active region, a second region of a second conductive type and a coupling-out surface, wherein the first region, the active region and the second region are arranged along a stacking direction, wherein the active region extends from a rear surface opposite the coupling-out surface to the coupling-out surface along a longitudinal direction transverse to or perpendicular to the stacking direction, wherein the coupling-out surface is arranged plane-parallel to the rear surface, and wherein the coupling-out surface and the rear surface of the semiconductor body are produced by an etching process.

A method for exposing side surfaces of a semiconductor body is disclosed. In an embodiment a method includes providing the semiconductor body having a laterally extending first main surface, forming a plurality of vertical side surfaces by partially removing material of the semiconductor body and thereby removing the first main surface in places, wherein each of the side surfaces forms an angle (&#x3b1;) between 110&#xb0; and 160&#xb0; inclusive with the remaining first main surface, applying a protective layer onto the semiconductor body so that, in a plan view, the protective layer completely covers the remaining first main surface and the obliquely formed side surfaces and partially removing the protective layer so that the protective layer is removed in regions on the obliquely formed side surfaces because of an inclination and remains at least partially preserved in regions on the remaining first main surface during a common process operation.

Method for the self-adjusted exposure of side surfaces of a semiconductor body

A method and a device for measuring a plurality of semiconductor chips in a wafer array are disclosed. In an embodiment a method for measuring the semiconductor chips in a wafer array, wherein the wafer array is arranged on an electrically conductive carrier so that in each case back contacts of the semiconductor chips are contacted by the carrier, wherein a contact structure is arranged on a side of the wafer array facing away from the carrier, and wherein the contact structure includes a contact element and/or a plurality of radiation-emitting measurement semiconductor chips, includes applying a voltage between the contact structure and the carrier and measuring the semiconductor chips depending on a luminous image which is generated by emitted radiation which is caused simultaneously by fluorescence when the semiconductor chips are illuminated or by a radiation-emitting operation of the measurement semiconductor chips when the voltage is applied.

Method and device for measurement of a plurality of semiconductor chips in a wafer array

A method of aligning semiconductor chips in a medium includes providing an electrically insulating liquid medium; providing semiconductor chips; forming a suspension with the medium and the semiconductor chips; exposing the semiconductor chips to electromagnetic radiation that generates free charge carriers in the semiconductor chips; arranging the suspension in an electric field in which the semiconductor chips are aligned along the electric field; and curing the medium after aligning the semiconductor chips.

Method of aligning semiconductor chips, method of arranging semiconductor chips, device that produces a semiconductor component, and semiconductor component

An optoelectronic semiconductor chip is disclosed. In an embodiment an optoelectronic semiconductor chip includes a semiconductor body comprising a first semiconductor structure, a second semiconductor structure and an active region between the first and the second semiconductor structure and a plurality of recesses, each penetrating at least one of the semiconductor structures and the active region, wherein a cover surface of the active region is a continuous surface, and wherein at least in some of the recesses, surfaces of the recesses are completely covered with an electrically insulating material.

Optoelectronic semiconductor chip

A single photon source includes a semiconductor body and a transducer, wherein the transducer during operation of a single photon source can be coupled into an active zone, disposed between a first and second semiconductor layer of the semiconductor body, the active zone and the transducer are arranged at a same vertical height to a carrier of the single photon source and piezoelectric intermediate layer material so that the intermediate layer is a propagation medium for surface waves generated or excited by the transducer, the intermediate layer is arranged in places between the first semiconductor layer and the active zone and adjoins the active zone, and an electrical insulation between the intermediate layer and the transducer is achieved by the intermediate layer being undoped at least in overlapping regions with the transducer or by an insulating layer being arranged between the transducer and the intermediate layer.

Growing community of inventors

Rohr in Niederbayern, Germany

Jens Ebbecke