Infineon Technologies Ag

Infineon Technologies Austria Ag

Siemens Aktiengesellschaft

Robert Bosch G.m.b.h.

Infineon Technology Ag

Jens Barrenscheen

Anton Mauder

Gunther Fenzl

Marcus Nuebling

Peter Rohm

Christian Heiling

Laurent Beaurenaut

Peter Bogner

Martin Krueger

Benno Koeppl

Markus Bina

Achim Vowe

Dirk Hammerschmidt

Markus Zannoth

Patrick Leteinturier

Matthias Bogus

Axel Aue

Marc Fahlenkamp

Anthony Sanders

Wilhard Christophorus Von Wendorff

Ansgar Pottbaecker

Philip Georg Brockerhoff

Karl Herz

Jens Graf

Dietmar Koenig

Andreas Peter Meiser

Martin Feldtkeller

Franz Jost

Giuseppe Bernacchia

Juergen Schaefer

Torsten Hinz

Guenter Hofer

Fabrizio Cortigiani

Herwig Wappis

Simon Brewerton

Herman Roozenbeek

Ljudmil Anastasov

Erwin Huber

Antonio Vilela

Harry Siebert

Marcus Schaemann

Andre Arens

Oreste Bernardi

Martin Huch

Klaus Hoermaier

Klaus Scheibert

Hannes Estl

Tim Weyland

Karl Johann Schretter

Hans Sulzer

Hermann Kern

Rainer Herold

Angela Rohm, Legal Representative

Dietmar Straeussnigg

Michael Kropfitsch

Bernhard Strzalkowski

Alexander Mayer

Arno Rabenstein

Peter Ossimitz

Tommaso Bacigalupo

Heimo Hartlieb

Werner Roessler

Marco Bachhuber

Pierrick Ausseresse

Christian Schweikert

Michael Krug

Goran Keser

Roderick McConnell

Ali Fawaz

Christopher Roemmelmayer

Andreas Pechlaner

Josef Neulinger

Reinhard Mueller

Andreas Jansen

Roland Schwenk

Peter Schneider

Frank Praemassing

Tom Roewe

Guenter Schwarzberger

Ning Chen

Dietmar Konig

Thomas Wünsche

Kevin Pluch

Dietmar Messner

Mario Keil

Dirk Elkemeier

Heinz Amann

Achim Schmidt

Hermann Roozenbeek

Mathias Dahlhaus

Lilla Akrour

Ralph Danklefsen

Bernard Strzalkowski

Diego Torrecilla

Toralf Hoffmann

Cristina Sanchez

Kay Krupka

Reza Fotouhi

Gunther Fenzel

A method for a responder bus node is described herein. In accordance with one embodiment, the method includes receiving a first frame over a first data channel of a serial bus, wherein the first frame comprises at least a first header field with first header data and a first payload field with first payload data. The method further includes checking whether a first address, which is based on the first header data, is equal to a predetermined address. When the first address is equal to the predetermined address, a read operation is performed using a second address, which is based on the first payload data, and, when the first address is not equal to the predetermined address, a write operation is performed using the first address and the payload data. Furthermore, a corresponding method for a commander bus node, as well as a respective responder and commander bus node are described.

Serial bus communication without read indication

In general, the disclosure describes circuits and techniques to operate power switch driver circuits as well as techniques to dynamically change configuration parameters. The power switch driver circuit of this disclosure may be configured to received communication signals along the same signal paths as for pulse modulated switching control signals. In other words, the power switch driver circuit may receive a main function signaling, switching the power switches on and off, overlaid with a secondary function signaling, communication, which may include configuration parameters. In this manner the power switch driver circuit may receive both switching (commutation) function and communication function along the same signal path.

Configuration of gate drivers with shoot through protection

A module includes: an electrically insulative housing; a driver circuit enclosed in the housing and configured to drive a control terminal of a power switch; a wireless communication circuit enclosed in the housing and configured to receive, through the housing, wireless control information transmitted to the module; and a wireless energy receiver enclosed in the housing and configured to receive, through the housing, energy wirelessly transmitted to the module, and to supply power to the driver circuit. The driver circuit is configured to drive the control terminal of the power switch based on the wireless control information received by the wireless communication circuit. A power electronic assembly that incorporates one or more of the modules and a corresponding power conversion control circuit are also described.

Power semiconductor module, power electronic assembly including one or more power semiconductor modules, and power conversion control circuit for a power semiconductor module

A system including circuitry to communicate data across an isolation barrier of a switch driver circuit. For switch driver circuits with galvanic isolation, the circuitry of this disclosure uses the unavoidable common mode voltages caused by the coupling capacitances of the data transfer circuit to evaluate the common mode voltage characteristics, such as the slew rate of a switching event. The switch driver circuit of this disclosure may include a common mode voltage detector to detect and measure features of the unavoidable common mode voltage during a switching event, such as voltage amplitude and slew rate. The common mode voltage detector may couple to a communication interface that provides the common mode voltage information to a controller for the switch driver circuit. In some examples, based on the received information, the controller may adjust the operation of the switching circuit.

Common mode evaluation

An electronic circuit includes a data bus, a first module, and a second module. The first module is coupled to the data bus and corresponds to a first address. The first module performs a first function and includes a first storage location for first configuration data for the first function and first error checking data. The first module also includes a first local configuration checker having a first identification code. The first error checking data is based on the first configuration data and the first identification code. The second module is coupled to the data bus and corresponds to a second address. The second module performs a second function and includes a second storage location for second configuration data and second error checking data. The second module also includes a second local configuration checker having a second identification code that is distinct from the first identification code.

Electronic circuit with local configuration checkers with unique ID codes

In accordance with an embodiment, a method includes switching on a transistor device by generating a first conducting channel by driving a first gate electrode and, before generating the first conducting channel, generating a second conducting channel by driving a second gate electrode, wherein the second gate electrode is adjacent the first gate electrode in a current flow direction of the transistor device.

Double gate transistor device and method of operating

A method for a slave bus and a master bus includes receiving a first frame via a first data channel, wherein the first frame includes at least first header data, first payload data and first checksum. The method further includes implementing a function depending on the header data contained in the received first frame, and generating a second frame including second header data, second payload data, which are determined by the implemented function, and a second checksum. The second checksum is ascertained at least on the basis of the second payload data and the first header data contained in the received first frame. The method also includes transmitting the second frame via a second data channel simultaneously with receiving the first frame via the first data channel.

Serial data communication with in-frame response

In some examples, a device includes a set of data storage elements, wherein each data storage element of the set of data storage elements is associated with a respective valid address vector, and wherein a bit flip in any bit of any of the valid address vectors leads to one of a set of invalid address vectors not associated with any of the set of data storage elements. The device also includes a decoder configured to receive a first address vector as part of a request and to check whether the first address vector corresponds to one of the valid address vectors or to one of the invalid address vectors. The decoder is also configured to select an associated data storage element in response to receiving the request and in response to determining that the first address vector corresponds to one of the valid address vectors.

Address vectors for data storage elements

A driver may comprise a first node, a second node, and processing circuitry. The first node is configured to receive a command from controller circuitry. The second node is configured to receive a commutation signal for activating or deactivating a switch. The processing circuitry is configured to determine, based on the received command, an activation setting for an activation characteristic for the switch and a deactivation setting for a deactivation characteristic for the switch and drive the switch based on the commutation signal. To drive the switch, the processing circuitry is configured to change, at a first time, the deactivation characteristic for the switch from a previous deactivation setting to the determined deactivation setting and change, at a second time that is different from the first time, the activation characteristic for the switch from a previous activation setting to the determined activation setting.

Scheduling commutation behavior changes for a driver

Methods for use in a measurement system. Some embodiments comprise at least one sensor unit and a control unit, wherein the at least one sensor unit is configured to detect a physical quantity and to form a sensor data signal. The method comprises, at the control unit, receiving a data receive signal from the sensor unit, and interpreting the data receive signal to be one of at least the sensor data signal and another data signal, wherein the interpreting is based on an attribute information intrinsic to the data receive signal. Furthermore, there is a sensor unit for use in measurement data acquisition, an apparatus configured to control a measurement data acquisition, a measurement system for use in measurement data acquisition, and a medium incorporating a sequence of operation steps that, when executed, perform a method for use in a measurement system for data acquisition.

Method and apparatus for use in measurement data acquisition

In accordance with an embodiment, a method includes generating a clock signal; generating a switching signal based on the clock signal; generating a synchronization signal having an edge transition corresponding to a predetermined phase of the switching signal; transmitting the synchronization signal to a master controller; receiving a frequency adjustment command from the master controller based on the transmitted synchronization signal; and adjusting a frequency of the clock signal based on the frequency adjustment command.

System and method of synchronizing a switching signal

This disclosure is directed to circuits and techniques for detecting or responding to temperature of a power switch. A driver circuit for the power switch may be configured to deliver a modulation signal to a control node of the power switch to control on/off switching of the power switch, wherein the driver circuit is further configured to modulate an output impedance of the driver circuit at the control node, perform one or more voltage measurements while modulating the output impedance of the driver circuit, and control the power switch based at least in part on the one or more voltage measurements.

Temperature detection of power switch using modulation of driver output impedance

Techniques for controlling a power converter with a control signal and circuitry configured to translate the control signal into one or more pulse modulated drive signal(s) to operate the power converter. The translation circuitry may receive the control signal, extract frequency information, duty cycle, dead time, and other information from the control signal, and output at least one pulse modulated drive signal, based on the extracted information, to a driving stage that may operate the power converter. The control signal may be a digital signal that includes rising edges and falling edges. The edges of the first type may define the frequency information. The edges of the second type may define other information extracted by the translation circuitry, e.g., duty cycle, dead time and so on. In some examples the power converter may be a resonant power converter.

Frequency modifying gate driver IC

A circuit for measurement of a voltage comprises a passive sensing element configured to be coupled between a measurement point and a reference point. The passive sensing element has a voltage-dependent impedance. Further, the circuit comprises an impedance detector and a reference circuit. The impedance detector is configured to detect the impedance of the passive sensing element by providing a probe signal to the passive sensing element and evaluating a response to the probe signal from the passive sensing element and a reference response from the reference circuit. Further, the circuit comprises a converter circuit configured to convert a result of evaluating the response and the reference response to a voltage level information.

Voltage measurement through reference circuit based impedance detection

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Munich, Germany

Jens Barrenscheen