Infineon Technologies Ag

Nan Ya Technology Corporation

Jens Bachmann

Klaus Goller

Dirk Efferenn

Chung-Hsin Lin

Uwe Kahler

Wen-Bin Lin

Jakob Kriz

Jens Hahn

Reiner Schwab

Ulrich Baier

Grit Bonsdorf

Dirk Grueneberg

Falko Höhnsdorf

Ronald Gottzein

Lee Donohue

Bernd Föste

A method for fabricating a capacitor arrangement which includes at least three electrodes is described. The capacitor arrangement is fabricated using a number of lithography methods that is smaller than the number of electrodes. A capacitor arrangement extending over more than two or more interlayers between metallization layers has a high capacitance per unit area and can be fabricated in a simple way is also described. The circuit arrangement has a high capacitance per unit area and can be fabricated in a simple way. An electrode layer is first patterned using a dry-etching process and residues of the electrode layer are removed using a wet-chemical process, making it possible to fabricate capacitors with excellent electrical properties.

Capacitor assemblies

The invention is concerned with a process for removing residue comprising a polymeric resist and metal oxide from a metal structure on a semiconductor substrate, the process comprising the steps of: (a) heating up the substrate with the metal structure in the presence of molecular nitrogen gas (N); (b) a stabilization step in the presence of pure molecular nitrogen gas (N); (c) a passivation step employing a plasma containing at least one of the group of water, nitrogen and oxygen; and (d) a stripping step containing oxygen to remove the residue, comprising resist.

Process for removing a residue from a metal structure on a semiconductor substrate

The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an auxiliary structure is arranged on the substrate adjacent to the useful structure, the auxiliary structure having an auxiliary structure side edge, wherein the useful structure side edge is opposite to the auxiliary structure side edge separated by a distance, and wherein the auxiliary structure useful structure distance is dimensioned such that a form of the useful structure side edge or a form of the substrate next to the useful structure side edge differs from a form in a device where there is no auxiliary structure.

Device having a useful structure and an auxiliary structure

A method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits includes the following steps: providing a substrate; providing a whisker-containing layer made of aluminum metal or an aluminum alloy on the substrate; back-etching and/or resputtering the whisker-containing layer such that the whiskers are essentially removed; and structuring the whisker-free layer into the lines.

Method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits

The present invention relates to a process for etching a metal layer system. The metal layer system includes a first aluminum-containing layer, a second aluminum-containing layer, and an interlayer arranged between the two aluminum-containing layers. The interlayer consists of a material that is suitable for end-point detection. The etching process includes a first etching step, in which the upper aluminum-containing layer is etched using a first etching angle, and a second etching step, in which the lower aluminum-containing layer is etched using a second etching angle. The process switches between the first etching step and the second etching step as soon as the end-point detection has detected that the interlayer has been reached. Accordingly, the interlayer is arranged at a location at which it is intended for the process to switch from the first etching step to the second etching step.

Process for etching a metal layer system

Growing community of inventors

Dresden, Germany

Jens Bachmann