Intel Corporation

Jenny Pelner

Greg E Scott

Vincent J Zimmer

Rajaram Regupathy

Asad Azam

Subrata Banik

James Pelner

Systems, methods, and apparatuses relating to circuitry to implement a multiprocessor boot flow for a faster boot process are described. In one embodiment, a system includes a hardware processor comprising a processor core, a cache coupled to the hardware processor, storage for hardware initialization code, and a controller circuit to initialize a portion of the cache as memory for usage by the hardware initialization code before beginning execution of the hardware initialization code after a power on of the system.

Methods, systems, and apparatuses for a multiprocessor boot flow for a faster boot process

Systems, apparatuses and methods may provide for technology to determine one or more default values associated with a block storage device and automatically retrieve boot code from the block storage device in accordance with the default value(s), wherein the boot code is retrieved via an expansion bus. In an example, the default value(s) include bus number information and address information, wherein the address information corresponds to a bus header of the block storage device. Moreover, the block storage device may be dedicated to the bus controller and retrieval of the boot code from the block storage device may bypass a bus enumeration procedure.

Booting firmware from expansion block storage devices

An improved method of testing a computer system comprises a sequence of tests that are performed when the computer system is first turned on, according to one embodiment. The operation of various components of the computer system, such as a chipset, a random access memory, a cache memory, a video controller, a keyboard controller, peripheral memory controllers, busses, and the like, is tested by a test program stored in read only memory (ROM). If the components successfully pass, an address is permanently changed in ROM, so that the test sequence is bypassed whenever the computer system is subsequently booted, saving significant time during future reboots. An improved computer system and a machine-accessible medium are also described.

Method to couple integrated circuit packages to bonding pads having vias

Articles, methods, apparatus, and systems to control access to a protected area of a memory are disclosed.

Memory access control system, apparatus, and method

Methods, circuitry, an apparatus, and a system for controlling access to a protected area of a memory are disclosed. The method includes detecting an attempt to write to the protected area, determining whether a write authorization flag (not located in the protected area) has been set by instructions located in the protected area, and, if the flag has been set, enabling the attempted write operation. The circuitry, apparatus, and system embody the method in various combinations of software and hardware, such that a write detection module alerts a processor module regarding attempts to write to the protected area, the processor module determines whether the write operation has been authorized by checking the state of the authorization flag, and enables the write operation to the protected area only if the authorization flag has been set.

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Phoenix, AZ, United States of America

Jenny Pelner