Microchip Technology Inc.

Jennifer Yuan Chiao

Randy L Yach

Igor Wojewoda

Joseph W Triece

Rodney J Drake

Steve Allen

A system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction, thereby allowing a processor system to increase memory space without reducing performance. A first address bus is coupled to the linearized program memory for sending addresses of instructions to be fetched to a linearized program memory. A pointer is coupled to the first address bus for storing an address location of a current instruction in the linearized program memory to be fetched and for placing the address location of the current instruction to be fetched on the first address bus. A second address bus is provided and has one end coupled to the output of the program memory and a second end coupled to the first address bus. The second address bus is used for placing an address of an operand of a second word of the two word jump instruction onto the first address bus after an address of an operand of a first word of the two word jump instruction has been placed on the first address bus. This allows the addresses of the first word and the second word to be combined to provide the full address value of the two word jump instruction in the same number of cycles as a single word jump instruction.

Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction

A phase-locked loop (PLL) circuit is used to synchronize a local clock frequency with an edge of a reference clock frequency, employing a phase detector to compare the local clock frequency and the reference clock frequency to generate a control signal indicative of the need to increase or to decrease the local clock frequency for phase locking thereof to the reference clock frequency. A voltage controlled oscillator (VCO) is responsive to a signal voltage derived from the control signal to vary the local clock frequency as necessary to achieve phase locking. A loop filter has a reference voltage threshold level which is pre-programmable to enable the loop filter to respond to the control signal by adjusting the signal voltage as a virtual step function toward the programmed reference voltage threshold level before application to the VCO, and then cycling up and down in a search for a stable control signal voltage to reduce the time necessary to achieve the desired phase locking.

Phase locked loop with improved lock time and stability

A phase-locked loop (PLL) circuit has a phase comparator for comparing the phases of a local clock frequency and a reference frequency to generate a control signal indicative of a direction of adjustment of the local clock frequency for reducing the phase difference between the two frequencies. A voltage controlled oscillator (VCO) of the PLL responds to application of a control voltage thereto to generate an oscillation signal frequency from which the local clock frequency is derived. A loop filter responds to the control signal from the phase comparator to develop a control voltage for application to the VCO to adjust the local clock frequency in the direction indicated by the control signal to reduce the relative phase difference. The loop filter has a start-up circuit for detecting a selected edge of a cycle of the reference frequency after a predetermined number of cycles following commencement of operation or reset of the PLL circuit as being indicative of stabilization of the reference frequency, and is responsive to detection of such selected edge for promptly producing a linear boost of the control voltage from an initial level of substantially zero volts to a predetermined pull-up level exceeding the level of control voltage required to achieve phase locking. This reduces the time interval required to achieve phase locking, measured from the selected cycle edge. The loop filter is also responsive to the control voltage reaching the pull-up level to incrementally reduce the control voltage to the level required to achieve phase locking.

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Chandler, AZ, United States of America

Jennifer Yuan Chiao