Lucent Technologies Inc.

At&t Bell Laboratories

Agere Systems Inc.

Agere Systems Guardian Corp.

Jenn-Ming Kuo

Yu-Chi Wang

Young-Kai Chen

Minghwei Hong

Jueinai Raynien Kwo

Alfred Yi Cho

Keith Wayne Goossen

Ya-Hong Xie

Donald Winslow Murphy

Lucian Arthur D'Asaro

Fan Ren

Arthur Mike Sergent

William Scott Hobson

Joseph Petrus Mannaerts

Ming-Chiang Wu

Shin-Shem Pei

Eugene A Fitzgerald, Jr

Maurice A Chin

Paul J Silverman

A novel method of forming a GaAs-based MOS structure comprises ion implantation after oxide formation, and subsequent slow heating and cooling, carried out such that essentially no interfacial defects that are detectable by high resolution transmission electron microscopy are formed. If the MOS structure is a MOS-FET then metal contacts are provided in conventional fashion. A post-metallization anneal can result in FETs that are substantially free of drain current/voltage hysteresis. MOS-FETs made according to the novel method can be produced with high yield and can have significantly increased lifetime, as compared to some prior art GaAs-based MOS-FETs.

Method of making an article comprising an oxide layer on a GaAs-based semiconductor body

Disclosed are a method of making GaAs-based enhancement-type MOS-FETs, and articles (e.g., GaAs-based ICs) that comprise such a MOS-FET. The MOS-FETs are planar devices, without etched recess or epitaxial re-growth, with gate oxide that is primarily Ga,O,, and with low midgap interface state density (e.g., at most 1&times;10,cm,eV,at 20&deg; C.). The method involves ion implantation, implant activation in an As-containing atmosphere, surface reconstruction, and in situ deposition of the gate oxide. In preferred embodiments, no processing step subsequent to gate oxide formation is carried out above 300&deg; C. in air, or above about 700&deg; C. in UHV. The method makes possible fabrication of planar enhancement-type MOS-FETs having excellent characteristics, and also makes possible fabrication of complementary MOS-FETs, as well as ICs comprising MOS-FETs and MES-FETs. The method includes deposition of gate oxide of overall composition Ga,A,O,, where Ga substantially is in the 3&plus; oxidation state, A is one or more electropositive stabilizer element adapted for stabilizing Ga in the 3&plus; oxidation state, x is greater than or equal to zero, z is selected to satisfy the requirement that both Ga and A are substantially fully oxidized, and y/(x&plus;y) is greater than 0.1.

In a method of making a flip-chip bonded GaAs-based opto-electronic device, removal of the GaAs substrate is facilitated by provision of a lattice matched (Al.sub.x Ga.sub.1-x)InP etch stop layer, exemplarily a Ga.sub.0.51 In.sub.0.49 P layer, and use of an etchant that isotropically etches GaAs such that an essentially mirror-like etch stop layer surface results, and that preferably exhibits an etch rate ratio of at least 200:1 for GaAs and the etch stop layer, respectively. Use of the novel substrate removal method can substantially increase device yield, and facilitate manufacture of large device arrays, e.g., arrays of detector/modulator diodes flip-chip bonded to Si CMOS chips.

Method of making a flip-chip bonded GaAs-based opto-electronic device

In a DH-PHEMT the channel layer comprises InGaAs and the donor layers comprise In.sub.0.5-q (Al.sub.x Ga.sub.1-x).sub.0.5+q P in which the mole fraction of Al is in the range of about 0.2.ltoreq.x.ltoreq.0.3. In another embodiment, an InAlGaP layer forms a Schottky barrier gate contact with a barrier height of about 1.0 eV and hence low leakage current. The devices exhibit high 2DEG density, current drivability, and breakdown voltage, making them suitable for low voltage application such as battery-powered, portable wireless equipment. The Schottky barrier contact may be used in devices other than HEMTs.

InAlGaP devices

In a DH-PHEMT the channel layer comprises InGaAs, the donor layers comprise In.sub.y Ga.sub.1-y P(0.15.ltoreq.y.ltoreq.0.85), and each of the spacer layers comprises an In.sub.0.5-q (Al.sub.x Ga.sub.1-x).sub.0.5+q P outer spacer layer (0.2.ltoreq.x) and an Al.sub.r Ga.sub.1-r As (0.ltoreq.r.ltoreq.0.3) inner spacer layer. In another embodiment, a similar InAlGaP layer forms a Schottky barrier gate contact with a barrier height of at least 1.0 eV and hence low leakage current. The devices exhibit the capability for both low noise and high power operation at low supply voltages.

Low noise, high power pseudomorphic HEMT

The invention is predicated upon the discovery by applicants that exposure of a Ge surface to arsenic produces a drastic change in the step structure of the Ge surface. Subsequent exposure to Ga and growth of GaAs produces three-dimensional growth and a high threading dislocation density at the GaAs/Ge interface. However exposure of the Ge surface to Ga does not substantially change the Ge step structure, and subsequent growth of GaAs is two-dimensional with little increase in threading dislocation density. Thus a high quality semiconductor heterostructure of gallium arsenide on germanium can be made by exposing a germanium surface in an environment substantially free of arsenic, depositing a layer of gallium on the surface and then growing a layer of gallium arsenide. The improved method can be employed to make a variety of optoelectronic devices such as light-emitting diodes.

Method of making semiconductor heterostructures of gallium arsenide on

Applicants have discovered a method of reproducibly fabricating SEED devices having an enhanced contrast ratio by adjusting the thickness of a cap layer in relation to the reflector stacks to form a Fabry-Perot cavity. Specifically, after growth of the reflector stack and the quantum wells, the optical thickness of the region above reflector stacks is measured without breaking vacuum, and based on such measurement a cap layer is grown of sufficient thickness to form a Fabry-Perot cavity for light of desired wavelength. The result is a device with enhanced contrast between the 'on' and 'off' states sufficiently so that the state can be directly read without differential processing.

Method for making self-electro-optical device and devices made thereby

A GaAs-based self-aligned laser with emission wavelength in the approximate wavelength regime 0.87-1.1 .mu.m is disclosed. The laser is a strained layer QW laser and is readily manufacturable. Preferred embodiments of the inventive laser do not comprise Al-containing semiconductor alloy. Lasers according to the invention can for instance be used advantageously as 0.98 .mu.m pump sources for Er-doped fiber amplifiers.

Growing community of inventors

Edison, NJ, United States of America

Jenn-Ming Kuo