Taiwan Semiconductor Manufacturing Comp. Ltd.

Jeng-Nan Hung

Kuo-Chung Yee

Chun-Hui Yu

Chen-Hua Douglas Yu

Po-Fan Lin

Ming-Da Cheng

Ching-Hua Hsieh

Wei-Hung Lin

Yi-Da Tsai

Chien-Ling Hwang

Chung-Jung Wu

Wei-chih Chen

Tung Li Wu

Hsu-Chin Tseng

Disclosed are a bonding system and a bonding method. In one embodiment, the bonding system includes a chamber, first and second electrostatic chucks, a visible light sensor module and a nonvisible light module. The chamber is configured to provide a vacuum state. The first electrostatic chuck is configured to hold a first substrate having a first alignment mark in the chamber, wherein the first electrostatic chuck has a first window. The second electrostatic chuck is configured to hold a second substrate having a second alignment mark in the chamber, wherein the second electrostatic chuck has a second window. The visible light sensor module is configured to capture images of the first and the second alignment marks. The nonvisible light module is configured to capture a combined image of the first and second alignment marks via the first and second windows overlapping each other in the vacuum state.

Bonding system and method

A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.

Semiconductor device

A package structure includes a wafer-form semiconductor package and a thermal dissipating system. The wafer-form semiconductor package includes semiconductor dies electrically connected with each other. The thermal dissipating system is located on and thermally coupled to the wafer-form semiconductor package, where the thermal dissipating system has a hollow structure with a fluidic space, and the fluidic space includes a ceiling and a floor. The thermal dissipating system includes at least one inlet opening, at least one outlet opening and a plurality of first microstructures. The at least one inlet opening and the at least one outlet opening are spatially communicated with the fluidic space. The first microstructures are located on the floor, and at least one of the first microstructures is corresponding to the at least one outlet opening.

Package structure and manufacturing method thereof

A structure including a first semiconductor die and a second semiconductor die is provided. The first semiconductor die includes a first bonding structure. The first bonding structure includes a first dielectric layer and first conductors embedded in the first dielectric layer. The second semiconductor die includes a second bonding structure. The second bonding structure includes a second dielectric layer and second conductors embedded in the second dielectric layer. The first dielectric layer is in contact with the second dielectric layer, and the first conductors are in contact with the second conductors. Thermal conductivity of the first dielectric layer and the second dielectric layer is greater than thermal conductivity of silicon dioxide.

Semiconductor structure including thermal enhanced bonding structure

Semiconductor structure

A semiconductor device including a substrate, a semiconductor package, a plurality of pillars and a lid is provided. The semiconductor package is disposed on the substrate and includes at least one semiconductor die. The plurality of pillars are disposed on the semiconductor package. The lid is disposed on the substrate and covers the semiconductor package and the plurality of pillars. The lid includes an inflow channel and an outflow channel to allow a coolant to flow into and out of a space between the substrate, the semiconductor package, the plurality of pillars and the lid. An inner surface of the lid, which faces and overlaps the plurality of pillars along a stacking direction of the semiconductor package and the lid, is a flat surface.

A semiconductor package structure includes a plurality of first dies spaced from each other, a molding layer between the first dies, a second die over the plurality of first dies and the molding layer, and an adhesive layer between the plurality of first dies and the second die, and between the molding layer and the second die. A first interface between the adhesive layer and the molding layer and a second interface between the adhesive layer and the plurality of first dies are at different levels.

Semiconductor package structure

Semiconductor structure comprising at least one system-on-integrated-circuit component

A semiconductor package includes a semiconductor package, a cap, a seal, and microstructures. The semiconductor package includes at least one semiconductor die. The cap is disposed over an upper surface of the semiconductor package. The seal is located on the semiconductor package and between the cap and the semiconductor package. The cap includes an inflow channel and an outflow channel. The active surface of the at least one semiconductor die faces away from the cap. The cap and an upper surface of the semiconductor package define a circulation recess providing fluidic communication between the inflow channel and the outflow channel. The seal is disposed around the circulation recess. The microstructures are located within the circulation recess, and the microstructures are connected to at least one of the cap and the at least one semiconductor die.

Semiconductor device and manufacturing method thereof

A method of manufacturing a semiconductor package structure is provided. A stacked structure formed over the carrier substrate is provided, wherein the stacked structure has a channel with an opening. The stacked structure is immersed into a fluidic molding material to render the fluidic molding material flow into the channel through the openings.

Growing community of inventors

Taichung, Taiwan

Jeng-Nan Hung