Mediatek Corporation

Jen-Yang Liu

Chun-Hsien Peng

I-Cheng Tsai

Yuan-Hwui Chung

I-No Liao

Chen-Jui Hsu

Ching-Shyang Maa

Hsueh-Wei Chiu

Hua-Lung Yang

A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.

Method of reducing memory effect of power amplifier

A test/calibration system includes a device under test (DUT) and a calibrated device. The calibrated device is coupled to the DUT, transmits or receives a test signal to or from the DUT in response to a control signal for a test item to test, measure or calibrate functioning or performance of an internal component of the DUT.

Low-cost test/calibration system and calibrated device for low-cost test/calibration system

Growing community of inventors

Taipei, Taiwan

Jen-Yang Liu