Taiwan Semiconductor Manufacturing Comp. Ltd.

Jen-Chun Chou

Ren-Yu Chang

Tung-Wen Cheng

Yu-Chiang Chou

Che-Cheng Chang

Chen-Hsiang Lu

In a method for manufacturing a semiconductor device, a fin structure is formed over a substrate, an isolation insulating layer is formed over the substrate such that an upper portion of the fin structure protrudes from the isolation insulating layer, a first dielectric layer is formed on the upper portion of the fin structure, a cover layer is formed on the first dielectric layer, the cover layer is partially removed from an upper part of the upper portion of the fin structure with the first dielectric layer, the first dielectric layer is removed from the upper part of the upper portion of the fin structure, a second dielectric layer is formed on the upper part of the upper portion of the fin structure, and a gate electrode is formed on the second dielectric layer and the first dielectric layer disposed on an lower part of the upper portion of the fin structure.

Method of manufacturing semiconductor devices having different gate dielectric thickness within one transistor

Semiconductor structures and methods are provided. In one embodiment, a method of the present disclosure includes forming a plurality of semiconductor fins over a substrate, after the forming of the plurality of semiconductor fins, removing an outer semiconductor fin of the plurality of semiconductor fins, and forming a gate structure over the plurality of semiconductor fins. The plurality of semiconductor fins include more than 3 semiconductor fins and the removing recesses a portion of the substrate directly under the outer semiconductor fin.

Edge fin trim process

A fin-based transistor and method for making same. In some embodiments, the transistor includes a first fin and a second fin formed on a substrate, the first and second fins being laterally spaced from each other, wherein an upper portion of the first fin is doped with a first type of dopant and an upper portion of the second fin is doped with a second type of dopant different from the first type of dopant; a protection layer formed over the first and second fins, wherein the protection layer comprises a dielectric material selected from a group comprising: silicon nitride, silicon oxynitride, and a combination thereof; and source and drain features formed in respective side portions of the first and second fins.

Method of forming protection layer in FinFET device

A method for forming a fin-based transistor includes forming a fin on a substrate; overlaying at least an upper portion of the fin by an oxide layer and a protection layer, wherein the protection layer is formed above the oxide layer; and doping at least the upper portion of the fin by using an ion implantation process, wherein the protection layer protects against damage to at least the upper portion of the fin and the oxide layer during the ion implantation process.

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Hsin-Chu, Taiwan

Jen-Chun Chou